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0 0 -1 -1 T 16400 80100 5 8 0 0 90 0 1 device=none T 16500 80100 5 8 0 0 90 0 1 graphical=1 ] N 17800 79900 16800 79900 4 { T 16905 79942 5 10 1 1 180 8 1 netname=SMS } C 16800 79900 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 79900 16700 80000 1 0 0 { T 16300 79900 5 8 0 0 90 0 1 pinseq=1 T 16200 79900 5 8 0 0 90 0 1 pinnumber=1 T 16100 79900 5 8 0 0 90 0 1 pintype=pas T 16000 79900 5 8 0 0 90 0 1 pinlabel=netside } L 16600 80100 16700 80000 10 30 0 0 -1 -1 T 16400 79900 5 8 0 0 90 0 1 device=none T 16500 79900 5 8 0 0 90 0 1 graphical=1 ] N 17800 79700 16800 79700 4 { T 16905 79742 5 10 1 1 180 8 1 netname=A18 } C 16800 79700 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 79700 16700 79800 1 0 0 { T 16300 79700 5 8 0 0 90 0 1 pinseq=1 T 16200 79700 5 8 0 0 90 0 1 pinnumber=1 T 16100 79700 5 8 0 0 90 0 1 pintype=pas T 16000 79700 5 8 0 0 90 0 1 pinlabel=netside } L 16600 79900 16700 79800 10 30 0 0 -1 -1 T 16400 79700 5 8 0 0 90 0 1 device=none T 16500 79700 5 8 0 0 90 0 1 graphical=1 ] N 17800 79500 16800 79500 4 { T 16905 79542 5 10 1 1 180 8 1 netname=A19 } C 16800 79500 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 79500 16700 79600 1 0 0 { T 16300 79500 5 8 0 0 90 0 1 pinseq=1 T 16200 79500 5 8 0 0 90 0 1 pinnumber=1 T 16100 79500 5 8 0 0 90 0 1 pintype=pas T 16000 79500 5 8 0 0 90 0 1 pinlabel=netside } L 16600 79700 16700 79600 10 30 0 0 -1 -1 T 16400 79500 5 8 0 0 90 0 1 device=none T 16500 79500 5 8 0 0 90 0 1 graphical=1 ] N 17800 79300 16800 79300 4 { T 16905 79342 5 10 1 1 180 8 1 netname=ABE0 } C 16800 79300 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 79300 16700 79400 1 0 0 { T 16300 79300 5 8 0 0 90 0 1 pinseq=1 T 16200 79300 5 8 0 0 90 0 1 pinnumber=1 T 16100 79300 5 8 0 0 90 0 1 pintype=pas T 16000 79300 5 8 0 0 90 0 1 pinlabel=netside } L 16600 79500 16700 79400 10 30 0 0 -1 -1 T 16400 79300 5 8 0 0 90 0 1 device=none T 16500 79300 5 8 0 0 90 0 1 graphical=1 ] N 17800 79100 16800 79100 4 { T 16905 79142 5 10 1 1 180 8 1 netname=ABE1 } C 16800 79100 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 79100 16700 79200 1 0 0 { T 16300 79100 5 8 0 0 90 0 1 pinseq=1 T 16200 79100 5 8 0 0 90 0 1 pinnumber=1 T 16100 79100 5 8 0 0 90 0 1 pintype=pas T 16000 79100 5 8 0 0 90 0 1 pinlabel=netside } L 16600 79300 16700 79200 10 30 0 0 -1 -1 T 16400 79100 5 8 0 0 90 0 1 device=none T 16500 79100 5 8 0 0 90 0 1 graphical=1 ] N 17800 78900 16800 78900 4 { T 16905 78942 5 10 1 1 180 8 1 netname=CLKOUT } C 16800 78900 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 78900 16700 79000 1 0 0 { T 16300 78900 5 8 0 0 90 0 1 pinseq=1 T 16200 78900 5 8 0 0 90 0 1 pinnumber=1 T 16100 78900 5 8 0 0 90 0 1 pintype=pas T 16000 78900 5 8 0 0 90 0 1 pinlabel=netside } L 16600 79100 16700 79000 10 30 0 0 -1 -1 T 16400 78900 5 8 0 0 90 0 1 device=none T 16500 78900 5 8 0 0 90 0 1 graphical=1 ] N 17800 78700 16800 78700 4 { T 16905 78742 5 10 1 1 180 8 1 netname=SCKE } C 16800 78700 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 78700 16700 78800 1 0 0 { T 16300 78700 5 8 0 0 90 0 1 pinseq=1 T 16200 78700 5 8 0 0 90 0 1 pinnumber=1 T 16100 78700 5 8 0 0 90 0 1 pintype=pas T 16000 78700 5 8 0 0 90 0 1 pinlabel=netside } L 16600 78900 16700 78800 10 30 0 0 -1 -1 T 16400 78700 5 8 0 0 90 0 1 device=none T 16500 78700 5 8 0 0 90 0 1 graphical=1 ] U 16600 77000 16600 84300 10 0 U 16600 84300 21300 84300 10 0 C 21600 83500 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 83700 21800 83700 1 0 0 { T 21700 83750 5 8 0 1 0 0 1 pinnumber=1 T 21700 83750 5 8 0 0 0 0 1 pinseq=1 T 21600 83700 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 83700 5 10 0 0 0 0 1 pintype=pas } P 22500 83700 22300 83700 1 0 0 { T 22300 83750 5 8 0 1 0 0 1 pinnumber=2 T 22300 83750 5 8 0 0 0 0 1 pinseq=2 T 22500 83700 5 10 0 0 0 0 1 pintype=pas T 22500 83700 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 83871 22000 83530 3 0 0 0 -1 -1 L 22100 83872 22100 83532 3 0 0 0 -1 -1 L 22300 83700 22100 83700 3 0 0 0 -1 -1 L 22000 83700 21800 83700 3 0 0 0 -1 -1 T 21900 84100 5 10 0 0 0 0 1 device=CAPACITOR T 21800 84000 8 10 0 1 0 0 1 refdes=C122 T 21800 84300 8 10 0 0 0 0 1 class=DISCRETE T 22100 84500 8 10 0 0 0 0 1 numslots=0 T 21900 84700 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 83723 5 10 1 1 0 0 1 refdes=C40 T 22112 83721 5 10 1 1 0 0 1 value=100nF T 22109 83544 5 10 1 1 0 0 1 footprint=d0603 } C 21600 83100 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 83300 21800 83300 1 0 0 { T 21700 83350 5 8 0 1 0 0 1 pinnumber=1 T 21700 83350 5 8 0 0 0 0 1 pinseq=1 T 21600 83300 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 83300 5 10 0 0 0 0 1 pintype=pas } P 22500 83300 22300 83300 1 0 0 { T 22300 83350 5 8 0 1 0 0 1 pinnumber=2 T 22300 83350 5 8 0 0 0 0 1 pinseq=2 T 22500 83300 5 10 0 0 0 0 1 pintype=pas T 22500 83300 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 83471 22000 83130 3 0 0 0 -1 -1 L 22100 83472 22100 83132 3 0 0 0 -1 -1 L 22300 83300 22100 83300 3 0 0 0 -1 -1 L 22000 83300 21800 83300 3 0 0 0 -1 -1 T 21900 83700 5 10 0 0 0 0 1 device=CAPACITOR T 21800 83600 8 10 0 1 0 0 1 refdes=C123 T 21800 83900 8 10 0 0 0 0 1 class=DISCRETE T 22100 84100 8 10 0 0 0 0 1 numslots=0 T 21900 84300 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 83323 5 10 1 1 0 0 1 refdes=C41 T 22112 83321 5 10 1 1 0 0 1 value=100nF T 22109 83144 5 10 1 1 0 0 1 footprint=d0603 } C 21600 82700 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 82900 21800 82900 1 0 0 { T 21700 82950 5 8 0 1 0 0 1 pinnumber=1 T 21700 82950 5 8 0 0 0 0 1 pinseq=1 T 21600 82900 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 82900 5 10 0 0 0 0 1 pintype=pas } P 22500 82900 22300 82900 1 0 0 { T 22300 82950 5 8 0 1 0 0 1 pinnumber=2 T 22300 82950 5 8 0 0 0 0 1 pinseq=2 T 22500 82900 5 10 0 0 0 0 1 pintype=pas T 22500 82900 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 83071 22000 82730 3 0 0 0 -1 -1 L 22100 83072 22100 82732 3 0 0 0 -1 -1 L 22300 82900 22100 82900 3 0 0 0 -1 -1 L 22000 82900 21800 82900 3 0 0 0 -1 -1 T 21900 83300 5 10 0 0 0 0 1 device=CAPACITOR T 21800 83200 8 10 0 1 0 0 1 refdes=C124 T 21800 83500 8 10 0 0 0 0 1 class=DISCRETE T 22100 83700 8 10 0 0 0 0 1 numslots=0 T 21900 83900 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 82923 5 10 1 1 0 0 1 refdes=C42 T 22112 82921 5 10 1 1 0 0 1 value=10nF T 22109 82744 5 10 1 1 0 0 1 footprint=d0603 } C 21600 82300 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 82500 21800 82500 1 0 0 { T 21700 82550 5 8 0 1 0 0 1 pinnumber=1 T 21700 82550 5 8 0 0 0 0 1 pinseq=1 T 21600 82500 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 82500 5 10 0 0 0 0 1 pintype=pas } P 22500 82500 22300 82500 1 0 0 { T 22300 82550 5 8 0 1 0 0 1 pinnumber=2 T 22300 82550 5 8 0 0 0 0 1 pinseq=2 T 22500 82500 5 10 0 0 0 0 1 pintype=pas T 22500 82500 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 82671 22000 82330 3 0 0 0 -1 -1 L 22100 82672 22100 82332 3 0 0 0 -1 -1 L 22300 82500 22100 82500 3 0 0 0 -1 -1 L 22000 82500 21800 82500 3 0 0 0 -1 -1 T 21900 82900 5 10 0 0 0 0 1 device=CAPACITOR T 21800 82800 8 10 0 1 0 0 1 refdes=C125 T 21800 83100 8 10 0 0 0 0 1 class=DISCRETE T 22100 83300 8 10 0 0 0 0 1 numslots=0 T 21900 83500 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 82523 5 10 1 1 0 0 1 refdes=C43 T 22112 82521 5 10 1 1 0 0 1 value=10nF T 22109 82344 5 10 1 1 0 0 1 footprint=d0603 } N 21400 83700 21400 81300 4 N 21400 82500 21600 82500 4 N 21400 82900 21600 82900 4 N 21400 83300 21600 83300 4 N 22500 83700 22800 83700 4 N 22800 83700 22800 81200 4 N 22500 82500 22800 82500 4 N 22500 82900 22800 82900 4 N 22500 83300 22800 83300 4 C 22700 80900 1 0 0 EMBEDDEDgnd-1.sym [ P 22800 81000 22800 81200 1 0 1 { T 22858 81061 5 4 0 1 0 0 1 pinnumber=1 T 22858 81061 5 4 0 0 0 0 1 pinseq=1 } L 22700 81000 22900 81000 3 0 0 0 -1 -1 L 22755 80950 22845 80950 3 0 0 0 -1 -1 L 22780 80910 22820 80910 3 0 0 0 -1 -1 T 23000 80950 8 10 0 0 0 0 1 net=GND:1 ] N 18600 83700 21600 83700 4 C 21600 81900 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 82100 21800 82100 1 0 0 { T 21700 82150 5 8 0 1 0 0 1 pinnumber=1 T 21700 82150 5 8 0 0 0 0 1 pinseq=1 T 21600 82100 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 82100 5 10 0 0 0 0 1 pintype=pas } P 22500 82100 22300 82100 1 0 0 { T 22300 82150 5 8 0 1 0 0 1 pinnumber=2 T 22300 82150 5 8 0 0 0 0 1 pinseq=2 T 22500 82100 5 10 0 0 0 0 1 pintype=pas T 22500 82100 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 82271 22000 81930 3 0 0 0 -1 -1 L 22100 82272 22100 81932 3 0 0 0 -1 -1 L 22300 82100 22100 82100 3 0 0 0 -1 -1 L 22000 82100 21800 82100 3 0 0 0 -1 -1 T 21900 82500 5 10 0 0 0 0 1 device=CAPACITOR T 21800 82400 8 10 0 1 0 0 1 refdes=C126 T 21800 82700 8 10 0 0 0 0 1 class=DISCRETE T 22100 82900 8 10 0 0 0 0 1 numslots=0 T 21900 83100 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 82123 5 10 1 1 0 0 1 refdes=C44 T 22112 82121 5 10 1 1 0 0 1 value=10nF T 22109 81944 5 10 1 1 0 0 1 footprint=d0603 } N 21400 82100 21600 82100 4 N 22500 82100 22800 82100 4 C 21600 81500 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 81700 21800 81700 1 0 0 { T 21700 81750 5 8 0 1 0 0 1 pinnumber=1 T 21700 81750 5 8 0 0 0 0 1 pinseq=1 T 21600 81700 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 81700 5 10 0 0 0 0 1 pintype=pas } P 22500 81700 22300 81700 1 0 0 { T 22300 81750 5 8 0 1 0 0 1 pinnumber=2 T 22300 81750 5 8 0 0 0 0 1 pinseq=2 T 22500 81700 5 10 0 0 0 0 1 pintype=pas T 22500 81700 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 81871 22000 81530 3 0 0 0 -1 -1 L 22100 81872 22100 81532 3 0 0 0 -1 -1 L 22300 81700 22100 81700 3 0 0 0 -1 -1 L 22000 81700 21800 81700 3 0 0 0 -1 -1 T 21900 82100 5 10 0 0 0 0 1 device=CAPACITOR T 21800 82000 8 10 0 1 0 0 1 refdes=C127 T 21800 82300 8 10 0 0 0 0 1 class=DISCRETE T 22100 82500 8 10 0 0 0 0 1 numslots=0 T 21900 82700 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 81723 5 10 1 1 0 0 1 refdes=C45 T 22112 81721 5 10 1 1 0 0 1 value=10nF T 22109 81544 5 10 1 1 0 0 1 footprint=d0603 } N 21400 81700 21600 81700 4 N 22500 81700 22800 81700 4 C 21600 81100 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 21600 81300 21800 81300 1 0 0 { T 21700 81350 5 8 0 1 0 0 1 pinnumber=1 T 21700 81350 5 8 0 0 0 0 1 pinseq=1 T 21600 81300 5 10 0 0 0 0 1 pinlabel=pin1 T 21600 81300 5 10 0 0 0 0 1 pintype=pas } P 22500 81300 22300 81300 1 0 0 { T 22300 81350 5 8 0 1 0 0 1 pinnumber=2 T 22300 81350 5 8 0 0 0 0 1 pinseq=2 T 22500 81300 5 10 0 0 0 0 1 pintype=pas T 22500 81300 5 10 0 0 0 0 1 pinlabel=pin2 } L 22000 81471 22000 81130 3 0 0 0 -1 -1 L 22100 81472 22100 81132 3 0 0 0 -1 -1 L 22300 81300 22100 81300 3 0 0 0 -1 -1 L 22000 81300 21800 81300 3 0 0 0 -1 -1 T 21900 81700 5 10 0 0 0 0 1 device=CAPACITOR T 21800 81600 8 10 0 1 0 0 1 refdes=C128 T 21800 81900 8 10 0 0 0 0 1 class=DISCRETE T 22100 82100 8 10 0 0 0 0 1 numslots=0 T 21900 82300 8 10 0 0 0 0 1 footprint=d0603 ] { T 21618 81323 5 10 1 1 0 0 1 refdes=C46 T 22112 81321 5 10 1 1 0 0 1 value=10nF T 22109 81144 5 10 1 1 0 0 1 footprint=d0603 } N 21400 81300 21600 81300 4 N 22500 81300 22800 81300 4 U 21300 84300 21300 80300 10 0 N 13100 89300 14600 89300 4 N 13100 89100 14600 89100 4 N 13100 88900 14600 88900 4 N 13100 88700 14600 88700 4 N 19100 89300 17300 89300 4 { T 18418 89336 5 10 1 1 0 0 1 netname=LED1A } N 19100 89100 17300 89100 4 { T 18418 89129 5 10 1 1 0 0 1 netname=LED1B } N 17300 88900 19100 88900 4 { T 18412 88929 5 10 1 1 0 0 1 netname=LED2A } N 17300 88700 19100 88700 4 { T 18412 88730 5 10 1 1 0 0 1 netname=LED2B } C 18000 86800 1 90 0 EMBEDDEDcapacitor-d1.sym [ P 17800 86800 17800 86600 1 0 0 { T 17750 86700 5 8 0 1 90 6 1 pinnumber=1 T 17750 86700 5 8 0 0 90 6 1 pinseq=1 T 17800 86800 5 10 0 0 90 6 1 pinlabel=pin1 T 17800 86800 5 10 0 0 90 6 1 pintype=pas } P 17800 85900 17800 86100 1 0 0 { T 17750 86100 5 8 0 1 90 6 1 pinnumber=2 T 17750 86100 5 8 0 0 90 6 1 pinseq=2 T 17800 85900 5 10 0 0 90 6 1 pintype=pas T 17800 85900 5 10 0 0 90 6 1 pinlabel=pin2 } L 17629 86400 17970 86400 3 0 0 0 -1 -1 L 17628 86300 17968 86300 3 0 0 0 -1 -1 L 17800 86100 17800 86300 3 0 0 0 -1 -1 L 17800 86400 17800 86600 3 0 0 0 -1 -1 T 17400 86500 5 10 0 0 90 6 1 device=CAPACITOR T 17500 86600 8 10 0 1 90 6 1 refdes=C141 T 17200 86600 8 10 0 0 90 6 1 class=DISCRETE T 17000 86300 8 10 0 0 90 6 1 numslots=0 T 16800 86500 8 10 0 0 90 6 1 footprint=d0603 ] { T 18282 86877 5 10 1 1 180 0 1 refdes=C66 T 18388 86679 5 10 1 1 180 0 1 value=100nF T 17956 86509 5 10 0 1 90 0 1 footprint=d0603 } C 18800 86800 1 90 0 EMBEDDEDcapacitor-d1.sym [ P 18600 86800 18600 86600 1 0 0 { T 18550 86700 5 8 0 1 90 6 1 pinnumber=1 T 18550 86700 5 8 0 0 90 6 1 pinseq=1 T 18600 86800 5 10 0 0 90 6 1 pinlabel=pin1 T 18600 86800 5 10 0 0 90 6 1 pintype=pas } P 18600 85900 18600 86100 1 0 0 { T 18550 86100 5 8 0 1 90 6 1 pinnumber=2 T 18550 86100 5 8 0 0 90 6 1 pinseq=2 T 18600 85900 5 10 0 0 90 6 1 pintype=pas T 18600 85900 5 10 0 0 90 6 1 pinlabel=pin2 } L 18429 86400 18770 86400 3 0 0 0 -1 -1 L 18428 86300 18768 86300 3 0 0 0 -1 -1 L 18600 86100 18600 86300 3 0 0 0 -1 -1 L 18600 86400 18600 86600 3 0 0 0 -1 -1 T 18200 86500 5 10 0 0 90 6 1 device=CAPACITOR T 18300 86600 8 10 0 1 90 6 1 refdes=C142 T 18000 86600 8 10 0 0 90 6 1 class=DISCRETE T 17800 86300 8 10 0 0 90 6 1 numslots=0 T 17600 86500 8 10 0 0 90 6 1 footprint=d0603 ] { T 19082 86877 5 10 1 1 180 0 1 refdes=C67 T 19188 86679 5 10 1 1 180 0 1 value=100nF T 18756 86509 5 10 0 1 90 0 1 footprint=d0603 } C 19700 86800 1 90 0 EMBEDDEDcapacitor-d1.sym [ P 19500 86800 19500 86600 1 0 0 { T 19450 86700 5 8 0 1 90 6 1 pinnumber=1 T 19450 86700 5 8 0 0 90 6 1 pinseq=1 T 19500 86800 5 10 0 0 90 6 1 pinlabel=pin1 T 19500 86800 5 10 0 0 90 6 1 pintype=pas } P 19500 85900 19500 86100 1 0 0 { T 19450 86100 5 8 0 1 90 6 1 pinnumber=2 T 19450 86100 5 8 0 0 90 6 1 pinseq=2 T 19500 85900 5 10 0 0 90 6 1 pintype=pas T 19500 85900 5 10 0 0 90 6 1 pinlabel=pin2 } L 19329 86400 19670 86400 3 0 0 0 -1 -1 L 19328 86300 19668 86300 3 0 0 0 -1 -1 L 19500 86100 19500 86300 3 0 0 0 -1 -1 L 19500 86400 19500 86600 3 0 0 0 -1 -1 T 19100 86500 5 10 0 0 90 6 1 device=CAPACITOR T 19200 86600 8 10 0 1 90 6 1 refdes=C143 T 18900 86600 8 10 0 0 90 6 1 class=DISCRETE T 18700 86300 8 10 0 0 90 6 1 numslots=0 T 18500 86500 8 10 0 0 90 6 1 footprint=d0603 ] { T 19982 86877 5 10 1 1 180 0 1 refdes=C68 T 20088 86679 5 10 1 1 180 0 1 value=100nF T 19656 86509 5 10 0 1 90 0 1 footprint=d0603 } C 20000 87200 1 270 0 EMBEDDED3.3V.sym [ P 20000 87000 20200 87000 1 0 0 { T 20050 86950 5 6 0 1 270 0 1 pinnumber=1 T 20050 86950 5 6 0 0 270 0 1 pinseq=1 } L 20200 87150 20200 86850 3 0 0 0 -1 -1 T 20250 87125 9 8 1 0 270 0 1 +3.3V T 20000 86900 8 8 0 0 270 0 1 net=+3.3V:1 ] C 17400 85900 1 0 0 EMBEDDEDgnd-1.sym [ P 17500 86000 17500 86200 1 0 1 { T 17558 86061 5 4 0 1 0 0 1 pinnumber=1 T 17558 86061 5 4 0 0 0 0 1 pinseq=1 } L 17400 86000 17600 86000 3 0 0 0 -1 -1 L 17455 85950 17545 85950 3 0 0 0 -1 -1 L 17480 85910 17520 85910 3 0 0 0 -1 -1 T 17700 85950 8 10 0 0 0 0 1 net=GND:1 ] N 17800 85900 17800 85800 4 N 19500 85900 19500 85800 4 N 18600 85900 18600 85800 4 N 19500 86800 19500 87000 4 N 17800 86800 17800 87000 4 N 18600 86800 18600 87000 4 C 21100 75800 1 90 0 EMBEDDEDcapacitor-d1.sym [ P 20900 75800 20900 76000 1 0 0 { T 20850 75900 5 8 0 1 90 0 1 pinnumber=1 T 20850 75900 5 8 0 0 90 0 1 pinseq=1 T 20900 75800 5 10 0 0 90 0 1 pinlabel=pin1 T 20900 75800 5 10 0 0 90 0 1 pintype=pas } P 20900 76700 20900 76500 1 0 0 { T 20850 76500 5 8 0 1 90 0 1 pinnumber=2 T 20850 76500 5 8 0 0 90 0 1 pinseq=2 T 20900 76700 5 10 0 0 90 0 1 pintype=pas T 20900 76700 5 10 0 0 90 0 1 pinlabel=pin2 } L 20729 76200 21070 76200 3 0 0 0 -1 -1 L 20728 76300 21068 76300 3 0 0 0 -1 -1 L 20900 76500 20900 76300 3 0 0 0 -1 -1 L 20900 76200 20900 76000 3 0 0 0 -1 -1 T 20500 76100 5 10 0 0 90 0 1 device=CAPACITOR T 20600 76000 8 10 0 1 90 0 1 refdes=C144 T 20300 76000 8 10 0 0 90 0 1 class=DISCRETE T 20100 76300 8 10 0 0 90 0 1 numslots=0 T 19900 76100 8 10 0 0 90 0 1 footprint=d0603 ] { T 20782 76077 5 10 1 1 180 0 1 refdes=C75 T 20788 75879 5 10 1 1 180 0 1 value=100nF T 21591 75656 5 10 0 1 180 0 1 footprint=d0603 } C 17900 75300 1 0 0 m25p64.sym { T 19200 76112 5 8 1 1 0 0 1 refdes=U3 T 19185 75918 5 8 1 1 0 0 1 value=M25P64VMF6 T 19207 75722 5 8 1 1 0 0 1 footprint=DSO16W } C 20700 76700 1 0 0 EMBEDDED3.3V.sym [ P 20900 76700 20900 76900 1 0 0 { T 20950 76750 5 6 0 1 0 0 1 pinnumber=1 T 20950 76750 5 6 0 0 0 0 1 pinseq=1 } L 20750 76900 21050 76900 3 0 0 0 -1 -1 T 20775 76950 9 8 1 0 0 0 1 +3.3V T 21000 76700 8 8 0 0 0 0 1 net=+3.3V:1 ] C 20500 76200 1 0 0 EMBEDDEDgnd-1.sym [ P 20600 76300 20600 76500 1 0 1 { T 20658 76361 5 4 0 1 0 0 1 pinnumber=1 T 20658 76361 5 4 0 0 0 0 1 pinseq=1 } L 20500 76300 20700 76300 3 0 0 0 -1 -1 L 20555 76250 20645 76250 3 0 0 0 -1 -1 L 20580 76210 20620 76210 3 0 0 0 -1 -1 T 20800 76250 8 10 0 0 0 0 1 net=GND:1 ] N 16800 76800 18900 76800 4 { T 16859 76842 5 10 1 1 0 0 1 netname=SPIFLASH } N 18900 77000 16800 77000 4 { T 16841 77042 5 10 1 1 0 0 1 netname=SCLK } N 18900 77200 16800 77200 4 { T 16841 77242 5 10 1 1 0 0 1 netname=SDI } C 20600 78300 1 270 0 EMBEDDEDresistor-d.sym [ P 20700 77400 20700 77550 1 0 0 { T 20750 77500 5 8 0 1 270 0 1 pinnumber=2 T 20750 77500 5 8 0 0 270 0 1 pinseq=2 T 20750 77500 5 8 0 1 270 0 1 pintype=pas T 20750 77500 5 8 0 0 270 0 1 pinlabel=2 } P 20700 78300 20700 78148 1 0 0 { T 20750 78200 5 8 0 1 270 0 1 pinnumber=1 T 20750 78200 5 8 0 0 270 0 1 pinseq=1 T 20750 78200 5 8 0 1 270 0 1 pintype=pas T 20750 78200 5 8 0 0 270 0 1 pinlabel=1 } B 20600 77550 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 20950 77900 5 10 0 0 270 0 1 device=RESISTOR T 20900 78100 8 10 0 1 270 0 1 refdes=R66 T 20950 77900 5 10 0 0 270 0 1 footprint=d0603 T 20950 77900 5 10 0 0 270 0 1 numslots=0 ] { T 20090 78010 5 10 1 1 0 0 1 refdes=R140 T 20132 77832 5 10 1 1 0 0 1 value=10k T 20820 78313 5 10 0 1 270 0 1 footprint=d0603 } C 18700 76400 1 0 0 EMBEDDED3.3V.sym [ P 18500 76400 18500 76600 1 0 0 { T 18450 76450 5 6 0 1 0 6 1 pinnumber=1 T 18450 76450 5 6 0 0 0 6 1 pinseq=1 } L 18650 76600 18350 76600 3 0 0 0 -1 -1 T 18625 76650 9 8 1 0 0 6 1 +3.3V T 18400 76400 8 8 0 0 0 6 1 net=+3.3V:1 ] N 20600 77200 20700 77200 4 N 20700 77200 20700 77400 4 N 20700 77400 16800 77400 4 { T 16841 77442 5 10 1 1 0 0 1 netname=SDO } N 18800 76400 18800 76600 4 N 18800 76600 18900 76600 4 C 16800 77400 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 77400 16700 77500 1 0 0 { T 16300 77400 5 8 0 0 90 0 1 pinseq=1 T 16200 77400 5 8 0 0 90 0 1 pinnumber=1 T 16100 77400 5 8 0 0 90 0 1 pintype=pas T 16000 77400 5 8 0 0 90 0 1 pinlabel=netside } L 16600 77600 16700 77500 10 30 0 0 -1 -1 T 16400 77400 5 8 0 0 90 0 1 device=none T 16500 77400 5 8 0 0 90 0 1 graphical=1 ] C 16800 77200 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 77200 16700 77300 1 0 0 { T 16300 77200 5 8 0 0 90 0 1 pinseq=1 T 16200 77200 5 8 0 0 90 0 1 pinnumber=1 T 16100 77200 5 8 0 0 90 0 1 pintype=pas T 16000 77200 5 8 0 0 90 0 1 pinlabel=netside } L 16600 77400 16700 77300 10 30 0 0 -1 -1 T 16400 77200 5 8 0 0 90 0 1 device=none T 16500 77200 5 8 0 0 90 0 1 graphical=1 ] C 16800 77000 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 77000 16700 77100 1 0 0 { T 16300 77000 5 8 0 0 90 0 1 pinseq=1 T 16200 77000 5 8 0 0 90 0 1 pinnumber=1 T 16100 77000 5 8 0 0 90 0 1 pintype=pas T 16000 77000 5 8 0 0 90 0 1 pinlabel=netside } L 16600 77200 16700 77100 10 30 0 0 -1 -1 T 16400 77000 5 8 0 0 90 0 1 device=none T 16500 77000 5 8 0 0 90 0 1 graphical=1 ] C 16800 76800 1 90 0 EMBEDDEDbusripper-1.sym [ P 16800 76800 16700 76900 1 0 0 { T 16300 76800 5 8 0 0 90 0 1 pinseq=1 T 16200 76800 5 8 0 0 90 0 1 pinnumber=1 T 16100 76800 5 8 0 0 90 0 1 pintype=pas T 16000 76800 5 8 0 0 90 0 1 pinlabel=netside } L 16600 77000 16700 76900 10 30 0 0 -1 -1 T 16400 76800 5 8 0 0 90 0 1 device=none T 16500 76800 5 8 0 0 90 0 1 graphical=1 ] C 14600 84700 1 0 0 bf-XC9536XL.sym { T 15095 84439 5 10 1 1 0 6 1 refdes=U7 T 14800 90100 5 10 0 0 0 0 1 footprint=LQFP44 T 14800 89900 5 10 0 0 0 0 1 device=XC9536-5VQ44C T 14600 84700 5 10 0 0 0 0 1 value=XC9536-5VQ44C } N 13400 88500 14600 88500 4 { T 13494 88545 5 10 1 1 0 0 1 netname=PF11 } N 17300 86200 17300 85800 4 N 17300 85800 19500 85800 4 C 23400 84500 1 0 0 EMBEDDEDheader14.sym [ P 22900 87000 22600 87000 1 0 1 { T 22825 87025 5 10 1 1 0 6 1 pinnumber=2 T 22900 87000 5 10 0 1 0 6 1 pintype=pas T 22900 87000 5 10 0 1 0 6 1 pinlabel=2 T 22900 87000 5 10 0 1 0 6 1 pinseq=2 } V 23000 87000 94 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 P 22600 87200 23000 87200 1 0 0 { T 22800 87225 5 10 1 1 0 6 1 pinnumber=1 T 22200 87100 5 10 0 1 0 6 1 pintype=pas T 22200 87200 5 10 0 1 0 6 1 pinlabel=1 T 22200 87200 5 10 0 1 0 6 1 pinseq=1 } L 23000 87200 23300 87100 3 0 0 0 -1 -1 P 22900 86600 22600 86600 1 0 1 { T 22825 86625 5 10 1 1 0 6 1 pinnumber=4 T 22900 86600 5 10 0 1 0 6 1 pintype=pas T 22900 86600 5 10 0 1 0 6 1 pinlabel=4 T 22900 86600 5 10 0 1 0 6 1 pinseq=4 } P 22600 86800 23000 86800 1 0 0 { T 22825 86825 5 10 1 1 0 6 1 pinnumber=3 T 22200 86800 5 10 0 1 0 6 1 pintype=pas T 22200 86800 5 10 0 1 0 6 1 pinlabel=3 T 22200 86800 5 10 0 1 0 6 1 pinseq=3 } L 23000 86800 23300 86700 3 0 0 0 -1 -1 P 22900 86200 22600 86200 1 0 1 { T 22800 86225 5 10 1 1 0 6 1 pinnumber=6 T 22900 86200 5 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87200 4 N 22500 87200 22500 87300 4 N 22000 85000 22000 87300 4 N 21500 85300 21500 87300 4 N 21000 85500 21000 87300 4 C 22100 87300 1 90 0 EMBEDDEDresistor-d.sym [ P 22000 88200 22000 88050 1 0 0 { T 21950 88100 5 8 0 1 90 0 1 pinnumber=2 T 21950 88100 5 8 0 0 90 0 1 pinseq=2 T 21950 88100 5 8 0 1 90 0 1 pintype=pas T 21950 88100 5 8 0 0 90 0 1 pinlabel=2 } P 22000 87300 22000 87452 1 0 0 { T 21950 87400 5 8 0 1 90 0 1 pinnumber=1 T 21950 87400 5 8 0 0 90 0 1 pinseq=1 T 21950 87400 5 8 0 1 90 0 1 pintype=pas T 21950 87400 5 8 0 0 90 0 1 pinlabel=1 } B 21900 87450 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 21750 87700 5 10 0 0 90 0 1 device=RESISTOR T 21800 87500 8 10 0 1 90 0 1 refdes=R70 T 21750 87700 5 10 0 0 90 0 1 footprint=d0603 T 21750 87700 5 10 0 0 90 0 1 numslots=0 ] { T 21881 87454 5 10 1 1 90 0 1 refdes=R60 T 22068 87532 5 10 1 1 90 0 1 value=10k T 21880 87287 5 10 0 1 90 0 1 footprint=d0603 } C 21600 87300 1 90 0 EMBEDDEDresistor-d.sym [ P 21500 88200 21500 88050 1 0 0 { T 21450 88100 5 8 0 1 90 0 1 pinnumber=2 T 21450 88100 5 8 0 0 90 0 1 pinseq=2 T 21450 88100 5 8 0 1 90 0 1 pintype=pas T 21450 88100 5 8 0 0 90 0 1 pinlabel=2 } P 21500 87300 21500 87452 1 0 0 { T 21450 87400 5 8 0 1 90 0 1 pinnumber=1 T 21450 87400 5 8 0 0 90 0 1 pinseq=1 T 21450 87400 5 8 0 1 90 0 1 pintype=pas T 21450 87400 5 8 0 0 90 0 1 pinlabel=1 } B 21400 87450 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 21250 87700 5 10 0 0 90 0 1 device=RESISTOR T 21300 87500 8 10 0 1 90 0 1 refdes=R71 T 21250 87700 5 10 0 0 90 0 1 footprint=d0603 T 21250 87700 5 10 0 0 90 0 1 numslots=0 ] { T 21381 87454 5 10 1 1 90 0 1 refdes=R59 T 21568 87532 5 10 1 1 90 0 1 value=10k T 21380 87287 5 10 0 1 90 0 1 footprint=d0603 } C 21100 87300 1 90 0 EMBEDDEDresistor-d.sym [ P 21000 88200 21000 88050 1 0 0 { T 20950 88100 5 8 0 1 90 0 1 pinnumber=2 T 20950 88100 5 8 0 0 90 0 1 pinseq=2 T 20950 88100 5 8 0 1 90 0 1 pintype=pas T 20950 88100 5 8 0 0 90 0 1 pinlabel=2 } P 21000 87300 21000 87452 1 0 0 { T 20950 87400 5 8 0 1 90 0 1 pinnumber=1 T 20950 87400 5 8 0 0 90 0 1 pinseq=1 T 20950 87400 5 8 0 1 90 0 1 pintype=pas T 20950 87400 5 8 0 0 90 0 1 pinlabel=1 } B 20900 87450 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 20750 87700 5 10 0 0 90 0 1 device=RESISTOR T 20800 87500 8 10 0 1 90 0 1 refdes=R72 T 20750 87700 5 10 0 0 90 0 1 footprint=d0603 T 20750 87700 5 10 0 0 90 0 1 numslots=0 ] { T 20881 87454 5 10 1 1 90 0 1 refdes=R58 T 21068 87532 5 10 1 1 90 0 1 value=10k T 20880 87287 5 10 0 1 90 0 1 footprint=d0603 } N 21000 88200 21000 88400 4 N 21000 88400 22500 88400 4 N 22500 88400 22500 88200 4 N 22000 88200 22000 88400 4 N 21500 88200 21500 88400 4 N 22600 86400 22200 86400 4 N 22200 86400 22200 88400 4 C 22300 88400 1 0 0 EMBEDDED3.3V.sym [ P 22500 88400 22500 88600 1 0 0 { T 22550 88450 5 6 0 1 0 0 1 pinnumber=1 T 22550 88450 5 6 0 0 0 0 1 pinseq=1 } L 22350 88600 22650 88600 3 0 0 0 -1 -1 T 22375 88650 9 8 1 0 0 0 1 +3.3V T 22600 88400 8 8 0 0 0 0 1 net=+3.3V:1 ] C 22300 84200 1 0 0 EMBEDDEDgnd-1.sym [ P 22400 84300 22400 84500 1 0 1 { T 22458 84361 5 4 0 1 0 0 1 pinnumber=1 T 22458 84361 5 4 0 0 0 0 1 pinseq=1 } L 22300 84300 22500 84300 3 0 0 0 -1 -1 L 22355 84250 22445 84250 3 0 0 0 -1 -1 L 22380 84210 22420 84210 3 0 0 0 -1 -1 T 22600 84250 8 10 0 0 0 0 1 net=GND:1 ] N 22400 86600 22400 84500 4 N 22600 84600 21000 84600 4 N 21000 84600 21000 84900 4 N 17300 85100 21500 85100 4 N 21500 85100 21500 85000 4 N 17300 85300 21500 85300 4 N 21500 85800 22600 85800 4 N 21000 86200 22600 86200 4 N 17300 85500 21000 85500 4 N 17300 84900 21000 84900 4 N 17500 86200 17300 86200 4 N 14600 87300 13400 87300 4 { T 13500 87347 5 10 1 1 0 0 1 netname=nCSA } N 14600 87100 13400 87100 4 { T 13494 87136 5 10 1 1 0 0 1 netname=nCSB } N 14600 86900 13400 86900 4 { T 13477 86929 5 10 1 1 0 0 1 netname=CLK1 } N 19100 88500 17300 88500 4 { T 18412 88536 5 10 1 1 0 0 1 netname=LED3A } N 19100 88300 17300 88300 4 { T 18406 88336 5 10 1 1 0 0 1 netname=LED3B } N 17300 88100 19100 88100 4 { T 18400 88142 5 10 1 1 0 0 1 netname=LED4A } N 17300 87900 19100 87900 4 { T 18394 87936 5 10 1 1 0 0 1 netname=LED4B } N 17300 86600 17300 87000 4 C 21800 85300 1 0 0 nc-left-1.sym { T 22085 85550 5 10 0 0 0 0 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 22100 86900 1 0 0 nc-left-1.sym { T 22385 87150 5 10 0 0 0 0 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 22100 86700 1 0 0 nc-left-1.sym { T 22385 86950 5 10 0 0 0 0 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } N 18900 87700 17300 87700 4 N 19100 87500 17300 87500 4 { T 18176 87530 5 10 1 1 0 0 1 netname=SPIFLASH } N 12500 85500 11500 85500 4 { T 11494 85541 5 10 1 1 0 0 1 netname=BBSDI } N 14600 84900 13400 84900 4 { T 13505 84930 5 10 1 1 0 0 1 netname=PF8 } N 14600 85900 13400 85900 4 { T 13500 85930 5 10 1 1 0 0 1 netname=BBSDO } N 12500 86300 11500 86300 4 { T 11500 86400 5 10 1 1 0 0 1 netname=BBSCLK } N 14600 85700 13400 85700 4 { T 13488 85735 5 10 1 1 0 0 1 netname=PF9 } N 17300 87000 20000 87000 4 N 14600 86700 13600 86700 4 N 14600 86500 13400 86500 4 { T 13500 86535 5 10 1 1 0 0 1 netname=FS1 } N 14600 85100 13400 85100 4 { T 13498 85128 5 10 1 1 0 0 1 netname=SDO } C 17100 76000 1 0 0 EMBEDDEDresistor-d.sym [ P 18000 76100 17850 76100 1 0 0 { T 17900 76150 5 8 0 1 0 0 1 pinnumber=2 T 17900 76150 5 8 0 0 0 0 1 pinseq=2 T 17900 76150 5 8 0 1 0 0 1 pintype=pas T 17900 76150 5 8 0 0 0 0 1 pinlabel=2 } P 17100 76100 17252 76100 1 0 0 { T 17200 76150 5 8 0 1 0 0 1 pinnumber=1 T 17200 76150 5 8 0 0 0 0 1 pinseq=1 T 17200 76150 5 8 0 1 0 0 1 pintype=pas T 17200 76150 5 8 0 0 0 0 1 pinlabel=1 } B 17250 76000 600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 17500 76350 5 10 0 0 0 0 1 device=RESISTOR T 17300 76300 8 10 0 1 0 0 1 refdes=R65 T 17500 76350 5 10 0 0 0 0 1 footprint=d0603 T 17500 76350 5 10 0 0 0 0 1 numslots=0 ] { T 17390 76310 5 10 1 1 0 0 1 refdes=R67 T 17332 76032 5 10 1 1 0 0 1 value=10k T 17087 76220 5 10 0 1 0 0 1 footprint=d0603 } C 16500 76100 1 0 0 EMBEDDED3.3V.sym [ P 16700 76100 16700 76300 1 0 0 { T 16750 76150 5 6 0 1 0 0 1 pinnumber=1 T 16750 76150 5 6 0 0 0 0 1 pinseq=1 } L 16550 76300 16850 76300 3 0 0 0 -1 -1 T 16575 76350 9 8 1 0 0 0 1 +3.3V T 16800 76100 8 8 0 0 0 0 1 net=+3.3V:1 ] N 16700 76100 17100 76100 4 N 18500 76400 18900 76400 4 N 10900 79000 9100 79000 4 { T 9208 79064 5 10 1 1 0 0 1 netname=AOE } N 10900 78700 9100 78700 4 { T 9208 78764 5 10 1 1 0 0 1 netname=AWE } C 9200 74300 1 0 1 dm9000A.sym { T 6500 74200 5 10 1 1 0 6 1 refdes=U5 T 9200 74300 5 10 0 0 0 6 1 value=DM9000AEP T 9900 85600 5 10 0 0 0 0 1 footprint=bf_LQFP48L T 9900 85400 5 10 0 0 0 0 1 device=DM9000AEP } N 3900 80000 6300 80000 4 N 6300 79600 3900 79600 4 N 3900 81200 6300 81200 4 N 6300 81600 3900 81600 4 N 6300 82000 4000 82000 4 C 2100 78500 1 90 1 bf-capacitor-1.sym { T 2500 78000 5 10 1 1 0 6 1 refdes=C99 T 2500 77800 5 10 1 1 0 6 1 value=0.1uF T 2100 78500 5 10 0 0 0 6 1 footprint=bf_0603 } N 1300 78500 1300 80100 4 C 1500 78100 1 0 1 bf-earth.sym { T 1500 78100 5 10 0 0 0 0 1 netname=EARTH2 } C 2000 77300 1 0 1 bf-agnd-1.sym C 5400 83100 1 90 1 bf-resistor-1.sym { T 6000 82800 5 10 1 1 0 6 1 refdes=R45 T 6000 82600 5 10 1 1 0 6 1 value=50 1% T 5400 83100 5 10 0 0 270 2 1 footprint=bf_0603 } C 4500 83100 1 90 1 bf-resistor-1.sym { T 5000 82800 5 10 1 1 0 6 1 refdes=R46 T 5000 82600 5 10 1 1 0 6 1 value=50 1% T 4500 83100 5 10 0 0 270 2 1 footprint=bf_0603 } C 5800 79400 1 90 1 bf-resistor-1.sym { T 5500 79300 5 10 1 1 0 6 1 refdes=R47 T 5500 79100 5 10 1 1 0 6 1 value=50 1% T 5800 79400 5 10 0 0 270 2 1 footprint=bf_0603 } C 5000 79400 1 90 1 bf-resistor-1.sym { T 4700 79300 5 10 1 1 0 6 1 refdes=R79 T 4700 79100 5 10 1 1 0 6 1 value=50 1% T 5000 79400 5 10 0 0 270 2 1 footprint=bf_0603 } N 3900 80800 4000 80800 4 N 5700 79400 5700 80000 4 N 4900 79400 4900 79600 4 C 5300 78500 1 90 1 bf-capacitor-1.sym { T 5300 77300 5 10 1 1 0 6 1 refdes=C100 T 5300 77100 5 10 1 1 0 6 1 value=0.1uF T 5300 78500 5 10 0 0 0 6 1 footprint=bf_0603 } N 5700 78500 4900 78500 4 C 4100 77300 1 0 1 bf-agnd-1.sym N 5300 82200 5300 81600 4 N 4400 82200 4400 81200 4 C 3900 81900 1 0 1 bf-agnd-1.sym C 4000 83100 1 90 1 bf-capacitor-1.sym { T 3500 82800 5 10 1 1 0 6 1 refdes=C101 T 3500 82600 5 10 1 1 0 6 1 value=0.1uF T 4000 83100 5 10 0 0 0 6 1 footprint=bf_0603 } N 5300 83100 5300 83200 4 N 5300 83200 3800 83200 4 N 3800 83200 3800 83100 4 N 4400 83100 4400 83200 4 N 4000 80300 6000 80300 4 N 6000 80300 6000 79200 4 N 6000 79200 6300 79200 4 C 6000 77900 1 270 1 bf-resistor-1.sym { T 5900 78300 5 10 1 1 0 6 1 refdes=R49 T 5900 78100 5 10 1 1 0 6 1 value=6k8 1% T 6000 77900 5 10 0 0 90 2 1 footprint=bf_0603 } C 6100 80500 1 0 1 bf-agnd-1.sym N 6000 80800 6300 80800 4 N 6300 80800 6300 80400 4 C 9400 75000 1 0 1 bf-gnd-1.sym C 5900 76000 1 270 1 bf-capacitor-1.sym { T 5800 76500 5 10 1 1 0 6 1 refdes=C103 T 5800 76300 5 10 1 1 0 6 1 value=0.1uF T 5900 76000 5 10 0 0 180 6 1 footprint=bf_0603 } C 9600 77700 1 180 1 bf-capacitor-1.sym { T 10600 77800 5 10 1 1 0 6 1 refdes=C104 T 10600 77600 5 10 1 1 0 6 1 value=22pF T 9600 77700 5 10 0 0 270 2 1 footprint=bf_0603 } C 9600 76900 1 180 1 bf-capacitor-1.sym { T 10100 76300 5 10 1 1 0 6 1 refdes=C105 T 10200 76100 5 10 1 1 0 6 1 value=22pF T 9600 76900 5 10 0 0 270 2 1 footprint=bf_0603 } C 10600 76400 1 0 1 bf-gnd-1.sym N 10500 77500 10500 76700 4 N 10600 79300 10900 79300 4 { T 10900 79350 5 10 1 1 0 6 1 netname=PF15 } C 5800 76900 1 0 1 bf-3.3V-plus-1.sym C 9500 76200 1 0 1 bf-3.3V-plus-1.sym N 10900 84800 9100 84800 4 { T 9850 84850 5 10 1 1 0 6 1 netname=D15 } N 9100 84500 10900 84500 4 { T 9850 84550 5 10 1 1 0 6 1 netname=D14 } N 9100 84200 10900 84200 4 { T 9850 84250 5 10 1 1 0 6 1 netname=D13 } N 10900 83900 9100 83900 4 { T 9850 83950 5 10 1 1 0 6 1 netname=D12 } N 9100 83600 10900 83600 4 { T 9850 83650 5 10 1 1 0 6 1 netname=D11 } N 10900 83300 9100 83300 4 { T 9850 83350 5 10 1 1 0 6 1 netname=D10 } N 9100 83000 10900 83000 4 { T 9850 83050 5 10 1 1 0 6 1 netname=D9 } N 9100 82700 10900 82700 4 { T 9850 82750 5 10 1 1 0 6 1 netname=D8 } N 10900 82400 9100 82400 4 { T 9850 82450 5 10 1 1 0 6 1 netname=D7 } N 9100 82100 10900 82100 4 { T 9850 82150 5 10 1 1 0 6 1 netname=D6 } N 9100 81800 10900 81800 4 { T 9850 81850 5 10 1 1 0 6 1 netname=D5 } N 10900 81500 9100 81500 4 { T 9850 81550 5 10 1 1 0 6 1 netname=D4 } N 9100 81200 10900 81200 4 { T 9850 81250 5 10 1 1 0 6 1 netname=D3 } N 10900 80900 9100 80900 4 { T 9850 80950 5 10 1 1 0 6 1 netname=D2 } N 9100 80600 10900 80600 4 { T 9850 80650 5 10 1 1 0 6 1 netname=D1 } N 9100 80300 10900 80300 4 { T 9850 80350 5 10 1 1 0 6 1 netname=D0 } N 10900 79600 9100 79600 4 { T 9800 79650 5 10 1 1 0 6 1 netname=A1 } N 9100 78100 10900 78100 4 { T 9850 78150 5 10 1 1 0 6 1 netname=RESET } N 9100 78400 10900 78400 4 { T 9675 78475 5 10 1 1 0 6 1 netname=AMS1 } N 1300 78500 1900 78500 4 N 6300 78800 6100 78800 4 N 6300 77900 6100 77900 4 N 6100 77900 6100 77600 4 N 6300 77600 4000 77600 4 C 5900 74500 1 270 1 bf-capacitor-1.sym { T 5700 75300 5 10 1 1 0 6 1 refdes=C106 T 5700 75100 5 10 1 1 0 6 1 value=0.1uF T 5900 74500 5 10 0 0 180 6 1 footprint=bf_0603 } C 9100 75300 1 270 1 bf-capacitor-1.sym { T 10100 75500 5 10 1 1 0 6 1 refdes=C107 T 10100 75300 5 10 1 1 0 6 1 value=0.1uF T 9100 75300 5 10 0 0 180 6 1 footprint=bf_0603 } C 5900 74500 1 0 1 bf-3.3V-plus-1.sym N 5600 76900 6300 76900 4 N 6100 76000 6100 75400 4 N 6300 76000 6100 76000 4 N 6300 75400 6100 75400 4 N 6300 74500 5700 74500 4 N 9300 76200 9100 76200 4 N 9100 75300 9300 75300 4 N 6300 75700 6100 75700 4 N 5900 75700 6100 75700 4 C 10600 79200 1 0 1 bf-resistor-1.sym { T 10088 79565 5 10 1 1 180 6 1 refdes=R73 T 9788 79565 5 10 1 1 180 6 1 value=33 T 10600 79200 5 10 0 0 0 6 1 footprint=bf_0603 } N 9700 79300 9100 79300 4 C 4200 78500 1 90 1 bf-capacitor-1.sym { T 3900 78800 5 10 1 1 0 6 1 refdes=C96 T 3900 78600 5 10 1 1 0 6 1 value=0.1uF T 4200 78500 5 10 0 0 0 6 1 footprint=bf_0603 } N 4600 78700 4000 78700 4 N 4000 78500 4000 82000 4 N 4600 78500 4600 78700 4 C 4800 78500 1 90 1 bf-capacitor-2.sym { T 4700 77300 5 10 1 1 0 6 1 refdes=C97 T 4700 77100 5 10 1 1 0 6 1 value=220uF 6V T 4800 78500 5 10 0 0 0 6 1 footprint=cap-elec-Panasonic-FK--D5.00-H5.80-mm } C 9200 76700 1 270 1 crystal-1.sym { T 9700 76900 5 10 0 0 90 2 1 device=CRYSTAL T 9490 77150 5 10 1 1 0 0 1 refdes=Y1 T 9900 76900 5 10 0 0 90 2 1 symversion=0.1 T 9490 76950 5 10 1 1 0 0 1 value=25MHz T 9200 76700 5 10 0 0 0 6 1 footprint=DHC49 } N 9600 77500 9100 77500 4 N 9300 77400 9300 77500 4 U 11100 77900 11100 87400 10 -1 C 10900 84800 1 180 1 busripper-1.sym { T 10900 85200 5 8 0 0 0 6 1 device=none } C 10900 84500 1 180 1 busripper-1.sym { T 10900 84900 5 8 0 0 0 6 1 device=none } C 10900 84200 1 180 1 busripper-1.sym { T 10900 84600 5 8 0 0 0 6 1 device=none } C 10900 83900 1 180 1 busripper-1.sym { T 10900 84300 5 8 0 0 0 6 1 device=none } C 10900 83600 1 180 1 busripper-1.sym { T 10900 84000 5 8 0 0 0 6 1 device=none } C 10900 83300 1 180 1 busripper-1.sym { T 10900 83700 5 8 0 0 0 6 1 device=none } C 10900 83000 1 180 1 busripper-1.sym { T 10900 83400 5 8 0 0 0 6 1 device=none } C 10900 82700 1 180 1 busripper-1.sym { T 10900 83100 5 8 0 0 0 6 1 device=none } C 10900 82400 1 180 1 busripper-1.sym { T 10900 82800 5 8 0 0 0 6 1 device=none } C 10900 82100 1 180 1 busripper-1.sym { T 10900 82500 5 8 0 0 0 6 1 device=none } C 10900 81800 1 180 1 busripper-1.sym { T 10900 82200 5 8 0 0 0 6 1 device=none } C 10900 81500 1 180 1 busripper-1.sym { T 10900 81900 5 8 0 0 0 6 1 device=none } C 10900 81200 1 180 1 busripper-1.sym { T 10900 81600 5 8 0 0 0 6 1 device=none } C 10900 80900 1 180 1 busripper-1.sym { T 10900 81300 5 8 0 0 0 6 1 device=none } C 10900 80600 1 180 1 busripper-1.sym { T 10900 81000 5 8 0 0 0 6 1 device=none } C 10900 80300 1 180 1 busripper-1.sym { T 10900 80700 5 8 0 0 0 6 1 device=none } C 10900 79600 1 180 1 busripper-1.sym { T 10900 80000 5 8 0 0 0 6 1 device=none } C 10900 79300 1 180 1 busripper-1.sym { T 10900 79700 5 8 0 0 0 6 1 device=none } C 10900 79000 1 180 1 busripper-1.sym { T 10900 79400 5 8 0 0 0 6 1 device=none } C 10900 78700 1 180 1 busripper-1.sym { T 10900 79100 5 8 0 0 0 6 1 device=none } C 10900 78400 1 180 1 busripper-1.sym { T 10900 78800 5 8 0 0 0 6 1 device=none } C 10900 78100 1 180 1 busripper-1.sym { T 10900 78500 5 8 0 0 0 6 1 device=none } U 16600 84300 11100 84300 10 0 C 1300 80500 1 0 1 nc-right-1.sym { T 805 80750 5 10 0 0 0 6 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 1300 80300 1 0 1 nc-right-1.sym { T 805 80550 5 10 0 0 0 6 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 6300 77200 1 0 1 nc-right-1.sym { T 6005 77450 5 10 0 0 0 6 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 6000 75400 1 0 1 bf-gnd-1.sym C 3900 79400 1 0 1 RJ45_CJCB88HF1Y0.sym { T 2100 79200 5 10 1 1 0 6 1 refdes=J7 T 3900 79400 5 10 0 0 0 6 1 value=CJCB88HF1Y0 } N 4000 80300 3900 80300 4 N 6300 83200 5800 83200 4 N 5800 83200 5800 83400 4 N 5800 83400 1200 83400 4 N 1200 83400 1200 81600 4 N 1200 81600 1300 81600 4 N 6300 83600 1100 83600 4 N 1100 83600 1100 81100 4 N 1100 81100 1300 81100 4 C 1900 85300 1 90 1 bf-resistor-1.sym { T 2400 84400 5 10 1 1 0 6 1 refdes=R99 T 2300 84200 5 10 1 1 0 6 1 value=510 T 1900 85300 5 10 0 0 270 2 1 footprint=bf_0603 } C 1400 85300 1 90 1 bf-resistor-1.sym { T 1265 84400 5 10 1 1 0 6 1 refdes=R100 T 1265 84200 5 10 1 1 0 6 1 value=510 T 1400 85300 5 10 0 0 270 2 1 footprint=bf_0603 } N 1300 81400 1000 81400 4 N 1000 81400 1000 83800 4 N 1300 80900 900 80900 4 N 900 80900 900 84000 4 N 1800 85300 1800 85500 4 N 1800 85500 1300 85500 4 N 1300 85500 1300 85300 4 N 1500 85500 1500 85600 4 C 1700 85600 1 0 1 bf-3.3V-plus-1.sym C 3900 74600 1 0 1 bf-agnd-1.sym C 2300 74600 1 0 1 bf-gnd-1.sym C 3400 75800 1 0 1 bf-resistor-1.sym { T 3235 76100 5 10 1 1 180 6 1 refdes=R115 T 2335 76100 5 10 1 1 180 6 1 value=0 T 3400 75800 5 10 0 0 0 6 1 footprint=bf_0805 } C 3400 75500 1 0 1 bf-resistor-1.sym { T 3235 75800 5 10 1 1 180 6 1 refdes=R116 T 2335 75800 5 10 1 1 180 6 1 value=0 T 3400 75500 5 10 0 0 0 6 1 footprint=bf_0805 } C 3400 75200 1 0 1 bf-resistor-1.sym { T 3235 75500 5 10 1 1 180 6 1 refdes=R117 T 2335 75500 5 10 1 1 180 6 1 value=0 T 3400 75200 5 10 0 0 0 6 1 footprint=bf_0805 } N 2200 74900 2200 75900 4 N 2200 75900 2500 75900 4 N 2500 75600 2200 75600 4 N 2500 75300 2200 75300 4 N 3400 75900 3800 75900 4 N 3800 74900 3800 75900 4 N 3400 75300 3800 75300 4 N 3400 75600 3800 75600 4 N 15400 80300 16400 80300 4 { T 16342 80364 5 10 1 1 0 6 1 netname=D0 } N 15400 80600 16400 80600 4 { T 16342 80664 5 10 1 1 0 6 1 netname=D1 } N 15400 80900 16400 80900 4 { T 16342 80964 5 10 1 1 0 6 1 netname=D2 } N 15400 81200 16400 81200 4 { T 16342 81264 5 10 1 1 0 6 1 netname=D3 } N 15400 81500 16400 81500 4 { T 16342 81564 5 10 1 1 0 6 1 netname=D4 } N 15400 81800 16400 81800 4 { T 16342 81864 5 10 1 1 0 6 1 netname=D5 } N 15400 82100 16400 82100 4 { T 16342 82164 5 10 1 1 0 6 1 netname=D6 } N 15400 82400 16400 82400 4 { T 16342 82464 5 10 1 1 0 6 1 netname=D7 } C 16400 82100 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 82100 16500 82000 1 0 0 { T 16900 82100 5 8 0 0 90 8 1 pinseq=1 T 17000 82100 5 8 0 0 90 8 1 pinnumber=1 T 17100 82100 5 8 0 0 90 8 1 pintype=pas T 17200 82100 5 8 0 0 90 8 1 pinlabel=netside } L 16600 81900 16500 82000 10 30 0 0 -1 -1 T 16800 82100 5 8 0 0 90 8 1 device=none T 16700 82100 5 8 0 0 90 8 1 graphical=1 ] C 16400 81800 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 81800 16500 81700 1 0 0 { T 16900 81800 5 8 0 0 90 8 1 pinseq=1 T 17000 81800 5 8 0 0 90 8 1 pinnumber=1 T 17100 81800 5 8 0 0 90 8 1 pintype=pas T 17200 81800 5 8 0 0 90 8 1 pinlabel=netside } L 16600 81600 16500 81700 10 30 0 0 -1 -1 T 16800 81800 5 8 0 0 90 8 1 device=none T 16700 81800 5 8 0 0 90 8 1 graphical=1 ] C 16400 81500 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 81500 16500 81400 1 0 0 { T 16900 81500 5 8 0 0 90 8 1 pinseq=1 T 17000 81500 5 8 0 0 90 8 1 pinnumber=1 T 17100 81500 5 8 0 0 90 8 1 pintype=pas T 17200 81500 5 8 0 0 90 8 1 pinlabel=netside } L 16600 81300 16500 81400 10 30 0 0 -1 -1 T 16800 81500 5 8 0 0 90 8 1 device=none T 16700 81500 5 8 0 0 90 8 1 graphical=1 ] C 16400 81200 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 81200 16500 81100 1 0 0 { T 16900 81200 5 8 0 0 90 8 1 pinseq=1 T 17000 81200 5 8 0 0 90 8 1 pinnumber=1 T 17100 81200 5 8 0 0 90 8 1 pintype=pas T 17200 81200 5 8 0 0 90 8 1 pinlabel=netside } L 16600 81000 16500 81100 10 30 0 0 -1 -1 T 16800 81200 5 8 0 0 90 8 1 device=none T 16700 81200 5 8 0 0 90 8 1 graphical=1 ] C 16400 80900 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 80900 16500 80800 1 0 0 { T 16900 80900 5 8 0 0 90 8 1 pinseq=1 T 17000 80900 5 8 0 0 90 8 1 pinnumber=1 T 17100 80900 5 8 0 0 90 8 1 pintype=pas T 17200 80900 5 8 0 0 90 8 1 pinlabel=netside } L 16600 80700 16500 80800 10 30 0 0 -1 -1 T 16800 80900 5 8 0 0 90 8 1 device=none T 16700 80900 5 8 0 0 90 8 1 graphical=1 ] C 16400 80600 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 80600 16500 80500 1 0 0 { T 16900 80600 5 8 0 0 90 8 1 pinseq=1 T 17000 80600 5 8 0 0 90 8 1 pinnumber=1 T 17100 80600 5 8 0 0 90 8 1 pintype=pas T 17200 80600 5 8 0 0 90 8 1 pinlabel=netside } L 16600 80400 16500 80500 10 30 0 0 -1 -1 T 16800 80600 5 8 0 0 90 8 1 device=none T 16700 80600 5 8 0 0 90 8 1 graphical=1 ] C 16400 80300 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 80300 16500 80200 1 0 0 { T 16900 80300 5 8 0 0 90 8 1 pinseq=1 T 17000 80300 5 8 0 0 90 8 1 pinnumber=1 T 17100 80300 5 8 0 0 90 8 1 pintype=pas T 17200 80300 5 8 0 0 90 8 1 pinlabel=netside } L 16600 80100 16500 80200 10 30 0 0 -1 -1 T 16800 80300 5 8 0 0 90 8 1 device=none T 16700 80300 5 8 0 0 90 8 1 graphical=1 ] C 16400 82400 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 82400 16500 82300 1 0 0 { T 16900 82400 5 8 0 0 90 8 1 pinseq=1 T 17000 82400 5 8 0 0 90 8 1 pinnumber=1 T 17100 82400 5 8 0 0 90 8 1 pintype=pas T 17200 82400 5 8 0 0 90 8 1 pinlabel=netside } L 16600 82200 16500 82300 10 30 0 0 -1 -1 T 16800 82400 5 8 0 0 90 8 1 device=none T 16700 82400 5 8 0 0 90 8 1 graphical=1 ] N 15400 79600 15500 79600 4 N 15500 79600 15500 78800 4 C 15400 78500 1 0 0 EMBEDDEDgnd-1.sym [ P 15500 78600 15500 78800 1 0 1 { T 15558 78661 5 4 0 1 0 0 1 pinnumber=1 T 15558 78661 5 4 0 0 0 0 1 pinseq=1 } L 15400 78600 15600 78600 3 0 0 0 -1 -1 L 15455 78550 15545 78550 3 0 0 0 -1 -1 L 15480 78510 15520 78510 3 0 0 0 -1 -1 T 15700 78550 8 10 0 0 0 0 1 net=GND:1 ] C 12900 83700 1 0 0 EMBEDDED3.3V.sym [ P 12700 83700 12700 83900 1 0 0 { T 12650 83750 5 6 0 1 0 6 1 pinnumber=1 T 12650 83750 5 6 0 0 0 6 1 pinseq=1 } L 12850 83900 12550 83900 3 0 0 0 -1 -1 T 12825 83950 9 8 1 0 0 6 1 +3.3V T 12600 83700 8 8 0 0 0 6 1 net=+3.3V:1 ] N 15400 79000 15500 79000 4 N 15400 79300 15500 79300 4 N 12800 82300 12700 82300 4 N 12700 82300 12700 83700 4 N 12800 82600 12700 82600 4 N 11300 80000 12800 80000 4 { T 11358 80064 5 10 1 1 0 0 1 netname=A2 } N 11300 79700 12800 79700 4 { T 11358 79764 5 10 1 1 0 0 1 netname=A1 } C 11800 79200 1 0 0 EMBEDDEDresistor-d.sym [ P 12700 79300 12550 79300 1 0 0 { T 12600 79350 5 8 0 1 0 0 1 pinnumber=2 T 12600 79350 5 8 0 0 0 0 1 pinseq=2 T 12600 79350 5 8 0 1 0 0 1 pintype=pas T 12600 79350 5 8 0 0 0 0 1 pinlabel=2 } P 11800 79300 11952 79300 1 0 0 { T 11900 79350 5 8 0 1 0 0 1 pinnumber=1 T 11900 79350 5 8 0 0 0 0 1 pinseq=1 T 11900 79350 5 8 0 1 0 0 1 pintype=pas T 11900 79350 5 8 0 0 0 0 1 pinlabel=1 } B 11950 79200 600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 12200 79550 5 10 0 0 0 0 1 device=RESISTOR T 12000 79500 8 10 0 1 0 0 1 refdes=R42 T 12200 79550 5 10 0 0 0 0 1 footprint=0603 T 12200 79550 5 10 0 0 0 0 1 numslots=0 ] { T 12012 79438 5 10 1 1 0 0 1 refdes=R120 T 12032 79232 5 10 1 1 0 0 1 value=100k T 11787 79420 5 10 0 1 0 0 1 footprint=bf_0603 } C 11800 79500 1 90 0 EMBEDDED3.3V.sym [ P 11800 79300 11600 79300 1 0 0 { T 11750 79250 5 6 0 1 90 6 1 pinnumber=1 T 11750 79250 5 6 0 0 90 6 1 pinseq=1 } L 11600 79450 11600 79150 3 0 0 0 -1 -1 T 11550 79425 9 8 1 0 90 6 1 +3.3V T 11800 79200 8 8 0 0 90 6 1 net=+3.3V:1 ] C 12700 78700 1 0 0 EMBEDDEDgnd-1.sym [ P 12800 78800 12800 79000 1 0 1 { T 12858 78861 5 4 0 1 0 0 1 pinnumber=1 T 12858 78861 5 4 0 0 0 0 1 pinseq=1 } L 12700 78800 12900 78800 3 0 0 0 -1 -1 L 12755 78750 12845 78750 3 0 0 0 -1 -1 L 12780 78710 12820 78710 3 0 0 0 -1 -1 T 13000 78750 8 10 0 0 0 0 1 net=GND:1 ] N 12700 79300 12800 79300 4 N 11300 81300 12800 81300 4 { T 11358 81364 5 10 1 1 0 0 1 netname=ARE } N 11300 81000 12800 81000 4 { T 11358 81064 5 10 1 1 0 0 1 netname=AWE } N 12800 80500 11300 80500 4 { T 11366 80561 5 10 1 1 0 0 1 netname=AMS0 } N 11600 81800 11300 81800 4 { T 11300 81850 5 10 1 1 0 0 1 netname=PF10 } C 11600 81700 1 0 0 EMBEDDEDresistor-d.sym [ P 12500 81800 12350 81800 1 0 0 { T 12400 81850 5 8 0 1 0 0 1 pinnumber=2 T 12400 81850 5 8 0 0 0 0 1 pinseq=2 T 12400 81850 5 8 0 1 0 0 1 pintype=pas T 12400 81850 5 8 0 0 0 0 1 pinlabel=2 } P 11600 81800 11752 81800 1 0 0 { T 11700 81850 5 8 0 1 0 0 1 pinnumber=1 T 11700 81850 5 8 0 0 0 0 1 pinseq=1 T 11700 81850 5 8 0 1 0 0 1 pintype=pas T 11700 81850 5 8 0 0 0 0 1 pinlabel=1 } B 11750 81700 600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 12000 82050 5 10 0 0 0 0 1 device=RESISTOR T 11800 82000 8 10 0 1 0 0 1 refdes=R42 T 12000 82050 5 10 0 0 0 0 1 footprint=0603 T 12000 82050 5 10 0 0 0 0 1 numslots=0 ] { T 11812 81938 5 10 1 1 0 0 1 refdes=R119 T 11832 81732 5 10 1 1 0 0 1 value=0 T 11587 81920 5 10 0 1 0 0 1 footprint=bf_0603 } N 12800 81800 12500 81800 4 C 11700 83500 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 11700 83700 11900 83700 1 0 0 { T 11800 83750 5 8 0 1 0 0 1 pinnumber=1 T 11800 83750 5 8 0 0 0 0 1 pinseq=1 T 11700 83700 5 10 0 0 0 0 1 pinlabel=pin1 T 11700 83700 5 10 0 0 0 0 1 pintype=pas } P 12600 83700 12400 83700 1 0 0 { T 12400 83750 5 8 0 1 0 0 1 pinnumber=2 T 12400 83750 5 8 0 0 0 0 1 pinseq=2 T 12600 83700 5 10 0 0 0 0 1 pintype=pas T 12600 83700 5 10 0 0 0 0 1 pinlabel=pin2 } L 12100 83871 12100 83530 3 0 0 0 -1 -1 L 12200 83872 12200 83532 3 0 0 0 -1 -1 L 12400 83700 12200 83700 3 0 0 0 -1 -1 L 12100 83700 11900 83700 3 0 0 0 -1 -1 T 12000 84100 5 10 0 0 0 0 1 device=CAPACITOR T 11900 84000 8 10 0 1 0 0 1 refdes=C76 T 11900 84300 8 10 0 0 0 0 1 class=DISCRETE T 12200 84500 8 10 0 0 0 0 1 numslots=0 T 12000 84700 8 10 0 0 0 0 1 footprint=d0603 ] { T 11500 83900 5 10 1 1 180 6 1 refdes=C202 T 11500 83600 5 10 1 1 180 6 1 value=100nF T 11700 83500 5 10 0 0 90 2 1 footprint=bf_0603 } C 11700 83000 1 0 0 EMBEDDEDcapacitor-d1.sym [ P 11700 83200 11900 83200 1 0 0 { T 11800 83250 5 8 0 1 0 0 1 pinnumber=1 T 11800 83250 5 8 0 0 0 0 1 pinseq=1 T 11700 83200 5 10 0 0 0 0 1 pinlabel=pin1 T 11700 83200 5 10 0 0 0 0 1 pintype=pas } P 12600 83200 12400 83200 1 0 0 { T 12400 83250 5 8 0 1 0 0 1 pinnumber=2 T 12400 83250 5 8 0 0 0 0 1 pinseq=2 T 12600 83200 5 10 0 0 0 0 1 pintype=pas T 12600 83200 5 10 0 0 0 0 1 pinlabel=pin2 } L 12100 83371 12100 83030 3 0 0 0 -1 -1 L 12200 83372 12200 83032 3 0 0 0 -1 -1 L 12400 83200 12200 83200 3 0 0 0 -1 -1 L 12100 83200 11900 83200 3 0 0 0 -1 -1 T 12000 83600 5 10 0 0 0 0 1 device=CAPACITOR T 11900 83500 8 10 0 1 0 0 1 refdes=C76 T 11900 83800 8 10 0 0 0 0 1 class=DISCRETE T 12200 84000 8 10 0 0 0 0 1 numslots=0 T 12000 84200 8 10 0 0 0 0 1 footprint=d0603 ] { T 11500 83400 5 10 1 1 180 6 1 refdes=C203 T 11500 83100 5 10 1 1 180 6 1 value=100nF T 11700 83000 5 10 0 0 90 2 1 footprint=bf_0603 } N 12700 83700 12600 83700 4 N 12600 83200 12700 83200 4 N 11700 83700 11200 83700 4 N 11200 83700 11200 83000 4 N 11700 83200 11200 83200 4 C 11300 82700 1 0 0 EMBEDDEDgnd-1.sym [ P 11200 82800 11200 83000 1 0 1 { T 11142 82861 5 4 0 1 0 6 1 pinnumber=1 T 11142 82861 5 4 0 0 0 6 1 pinseq=1 } L 11300 82800 11100 82800 3 0 0 0 -1 -1 L 11245 82750 11155 82750 3 0 0 0 -1 -1 L 11220 82710 11180 82710 3 0 0 0 -1 -1 T 11000 82750 8 10 0 0 0 6 1 net=GND:1 ] C 11300 81000 1 90 0 EMBEDDEDbusripper-1.sym [ P 11300 81000 11200 80900 1 0 0 { T 10800 81000 5 8 0 0 90 6 1 pinseq=1 T 10700 81000 5 8 0 0 90 6 1 pinnumber=1 T 10600 81000 5 8 0 0 90 6 1 pintype=pas T 10500 81000 5 8 0 0 90 6 1 pinlabel=netside } L 11100 80800 11200 80900 10 30 0 0 -1 -1 T 10900 81000 5 8 0 0 90 6 1 device=none T 11000 81000 5 8 0 0 90 6 1 graphical=1 ] C 11300 80000 1 90 0 EMBEDDEDbusripper-1.sym [ P 11300 80000 11200 79900 1 0 0 { T 10800 80000 5 8 0 0 90 6 1 pinseq=1 T 10700 80000 5 8 0 0 90 6 1 pinnumber=1 T 10600 80000 5 8 0 0 90 6 1 pintype=pas T 10500 80000 5 8 0 0 90 6 1 pinlabel=netside } L 11100 79800 11200 79900 10 30 0 0 -1 -1 T 10900 80000 5 8 0 0 90 6 1 device=none T 11000 80000 5 8 0 0 90 6 1 graphical=1 ] C 11300 79700 1 90 0 EMBEDDEDbusripper-1.sym [ P 11300 79700 11200 79600 1 0 0 { T 10800 79700 5 8 0 0 90 6 1 pinseq=1 T 10700 79700 5 8 0 0 90 6 1 pinnumber=1 T 10600 79700 5 8 0 0 90 6 1 pintype=pas T 10500 79700 5 8 0 0 90 6 1 pinlabel=netside } L 11100 79500 11200 79600 10 30 0 0 -1 -1 T 10900 79700 5 8 0 0 90 6 1 device=none T 11000 79700 5 8 0 0 90 6 1 graphical=1 ] C 11300 81300 1 90 0 EMBEDDEDbusripper-1.sym [ P 11300 81300 11200 81200 1 0 0 { T 10800 81300 5 8 0 0 90 6 1 pinseq=1 T 10700 81300 5 8 0 0 90 6 1 pinnumber=1 T 10600 81300 5 8 0 0 90 6 1 pintype=pas T 10500 81300 5 8 0 0 90 6 1 pinlabel=netside } L 11100 81100 11200 81200 10 30 0 0 -1 -1 T 10900 81300 5 8 0 0 90 6 1 device=none T 11000 81300 5 8 0 0 90 6 1 graphical=1 ] C 11300 81800 1 90 0 EMBEDDEDbusripper-1.sym [ P 11300 81800 11200 81700 1 0 0 { T 10800 81800 5 8 0 0 90 6 1 pinseq=1 T 10700 81800 5 8 0 0 90 6 1 pinnumber=1 T 10600 81800 5 8 0 0 90 6 1 pintype=pas T 10500 81800 5 8 0 0 90 6 1 pinlabel=netside } L 11100 81600 11200 81700 10 30 0 0 -1 -1 T 10900 81800 5 8 0 0 90 6 1 device=none T 11000 81800 5 8 0 0 90 6 1 graphical=1 ] C 11300 80500 1 90 0 EMBEDDEDbusripper-1.sym [ P 11300 80500 11200 80400 1 0 0 { T 10800 80500 5 8 0 0 90 6 1 pinseq=1 T 10700 80500 5 8 0 0 90 6 1 pinnumber=1 T 10600 80500 5 8 0 0 90 6 1 pintype=pas T 10500 80500 5 8 0 0 90 6 1 pinlabel=netside } L 11100 80300 11200 80400 10 30 0 0 -1 -1 T 10900 80500 5 8 0 0 90 6 1 device=none T 11000 80500 5 8 0 0 90 6 1 graphical=1 ] C 12800 78400 1 0 0 NAND.sym { T 13400 82900 5 10 1 1 0 6 1 refdes=U4 T 8900 82250 5 10 0 0 0 0 1 symversion=1.0 T 13100 78650 5 10 1 1 0 0 1 device=MT29F2G08AABWP T 13500 78450 5 10 1 1 0 0 1 footprint=DTSOPI48 } C 11600 82500 1 90 0 EMBEDDED3.3V.sym [ P 11600 82300 11400 82300 1 0 0 { T 11550 82250 5 6 0 1 90 6 1 pinnumber=1 T 11550 82250 5 6 0 0 90 6 1 pinseq=1 } L 11400 82450 11400 82150 3 0 0 0 -1 -1 T 11350 82425 9 8 1 0 90 6 1 +3.3V T 11600 82200 8 8 0 0 90 6 1 net=+3.3V:1 ] C 11600 82200 1 0 0 EMBEDDEDresistor-d.sym [ P 12500 82300 12350 82300 1 0 0 { T 12400 82350 5 8 0 1 0 0 1 pinnumber=2 T 12400 82350 5 8 0 0 0 0 1 pinseq=2 T 12400 82350 5 8 0 1 0 0 1 pintype=pas T 12400 82350 5 8 0 0 0 0 1 pinlabel=2 } P 11600 82300 11752 82300 1 0 0 { T 11700 82350 5 8 0 1 0 0 1 pinnumber=1 T 11700 82350 5 8 0 0 0 0 1 pinseq=1 T 11700 82350 5 8 0 1 0 0 1 pintype=pas T 11700 82350 5 8 0 0 0 0 1 pinlabel=1 } B 11750 82200 600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 12000 82550 5 10 0 0 0 0 1 device=RESISTOR T 11800 82500 8 10 0 1 0 0 1 refdes=R42 T 12000 82550 5 10 0 0 0 0 1 footprint=0603 T 12000 82550 5 10 0 0 0 0 1 numslots=0 ] { T 11812 82438 5 10 1 1 0 0 1 refdes=R121 T 11832 82232 5 10 1 1 0 0 1 value=100k T 11587 82420 5 10 0 1 0 0 1 footprint=bf_0603 } N 12500 82300 12600 82300 4 N 12600 82300 12600 81800 4 N 1000 83800 1800 83800 4 N 1800 83800 1800 84400 4 N 900 84000 1300 84000 4 N 1300 84000 1300 84400 4 C 900 89400 1 0 0 EMBEDDEDdpad-l.sym [ P 1300 89600 1600 89600 1 0 1 { T 1461 89630 5 10 1 1 0 0 1 pinnumber=1 T 1300 89600 5 10 0 0 0 0 1 pinseq=1 T 1300 89600 5 10 0 0 0 0 1 pintype=pas T 1300 89600 5 10 0 0 0 0 1 pinlabel=1 } V 1100 89600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 1100 89600 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 900 89900 8 10 0 1 0 0 1 refdes=pad5 T 1100 90100 8 10 0 0 0 0 1 numslots=0 T 1000 90500 8 10 0 0 0 0 1 description=PAD T 1000 90300 8 10 0 0 0 0 1 device=PAD ] { T 900 89900 5 10 1 1 0 0 1 refdes=pad1 T 900 89400 5 10 0 1 0 0 1 footprint=dpad-3mm } C 2500 89400 1 0 0 EMBEDDEDdpad-l.sym [ P 2100 89600 1800 89600 1 0 1 { T 1939 89630 5 10 1 1 0 6 1 pinnumber=1 T 2100 89600 5 10 0 0 0 6 1 pinseq=1 T 2100 89600 5 10 0 0 0 6 1 pintype=pas T 2100 89600 5 10 0 0 0 6 1 pinlabel=1 } V 2300 89600 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2300 89600 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 2500 89900 8 10 0 1 0 6 1 refdes=pad6 T 2300 90100 8 10 0 0 0 6 1 numslots=0 T 2400 90500 8 10 0 0 0 6 1 description=PAD T 2400 90300 8 10 0 0 0 6 1 device=PAD ] { T 2500 89900 5 10 1 1 0 6 1 refdes=pad3 T 2500 89400 5 10 0 0 0 0 1 footprint=dpad-3mm } C 2500 88700 1 0 0 EMBEDDEDdpad-l.sym [ P 2100 88900 1800 88900 1 0 1 { T 1939 88930 5 10 1 1 0 6 1 pinnumber=1 T 2100 88900 5 10 0 0 0 6 1 pinseq=1 T 2100 88900 5 10 0 0 0 6 1 pintype=pas T 2100 88900 5 10 0 0 0 6 1 pinlabel=1 } V 2300 88900 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2300 88900 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 2500 89200 8 10 0 1 0 6 1 refdes=pad7 T 2300 89400 8 10 0 0 0 6 1 numslots=0 T 2400 89800 8 10 0 0 0 6 1 description=PAD T 2400 89600 8 10 0 0 0 6 1 device=PAD ] { T 2500 89200 5 10 1 1 0 6 1 refdes=pad4 T 2500 88700 5 10 0 0 0 0 1 footprint=dpad-3mm } C 900 88700 1 0 0 EMBEDDEDdpad-l.sym [ P 1300 88900 1600 88900 1 0 1 { T 1461 88930 5 10 1 1 0 0 1 pinnumber=1 T 1300 88900 5 10 0 0 0 0 1 pinseq=1 T 1300 88900 5 10 0 0 0 0 1 pintype=pas T 1300 88900 5 10 0 0 0 0 1 pinlabel=1 } V 1100 88900 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 1100 88900 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 900 89200 8 10 0 1 0 0 1 refdes=pad8 T 1100 89400 8 10 0 0 0 0 1 numslots=0 T 1000 89800 8 10 0 0 0 0 1 description=PAD T 1000 89600 8 10 0 0 0 0 1 device=PAD ] { T 900 89200 5 10 1 1 0 0 1 refdes=pad2 T 900 88700 5 10 0 0 0 0 1 footprint=dpad-3mm } C 1600 87800 1 0 0 EMBEDDEDgnd-1.sym [ P 1700 87900 1700 88100 1 0 1 { T 1758 87961 5 4 0 1 0 0 1 pinnumber=1 T 1758 87961 5 4 0 0 0 0 1 pinseq=1 } L 1600 87900 1800 87900 3 0 0 0 -1 -1 L 1655 87850 1745 87850 3 0 0 0 -1 -1 L 1680 87810 1720 87810 3 0 0 0 -1 -1 T 1900 87850 8 10 0 0 0 0 1 net=GND:1 ] N 1600 89600 1800 89600 4 N 1600 88900 1800 88900 4 N 1700 88200 1700 88900 4 N 1700 88900 1700 89600 4 C 6300 85700 1 0 0 EMBEDDEDmax232-d.sym [ P 8000 88000 8300 88000 1 0 1 { T 8100 88050 5 8 1 1 0 0 1 pinnumber=2 T 8100 87950 5 8 0 1 0 2 1 pinseq=2 T 7950 88000 5 8 1 1 0 6 1 pinlabel=V+ T 7950 88000 5 8 0 1 0 8 1 pintype=pas } P 6600 88400 6300 88400 1 0 1 { T 6500 88450 5 8 1 1 0 6 1 pinnumber=3 T 6500 88350 5 8 0 1 0 8 1 pinseq=3 T 6650 88400 5 8 1 1 0 0 1 pinlabel=C1- T 6650 88400 5 8 0 1 0 2 1 pintype=pas } P 6600 88000 6300 88000 1 0 1 { T 6500 88050 5 8 1 1 0 6 1 pinnumber=4 T 6500 87950 5 8 0 1 0 8 1 pinseq=4 T 6650 88000 5 8 1 1 0 0 1 pinlabel=C2+ T 6650 88000 5 8 0 1 0 2 1 pintype=pas } P 6600 87600 6300 87600 1 0 1 { T 6500 87650 5 8 1 1 0 6 1 pinnumber=5 T 6500 87550 5 8 0 1 0 8 1 pinseq=5 T 6650 87600 5 8 1 1 0 0 1 pinlabel=C2- T 6650 87600 5 8 0 1 0 2 1 pintype=pas } P 8000 87600 8300 87600 1 0 1 { T 8100 87650 5 8 1 1 0 0 1 pinnumber=6 T 8100 87550 5 8 0 1 0 2 1 pinseq=6 T 7950 87600 5 8 1 1 0 6 1 pinlabel=V- T 7950 87600 5 8 0 1 0 8 1 pintype=pas } P 6600 86400 6300 86400 1 0 1 { T 6500 86450 5 8 1 1 0 6 1 pinnumber=7 T 6500 86350 5 8 0 1 0 8 1 pinseq=7 T 6650 86400 5 8 1 1 0 0 1 pinlabel=Tx2 Out T 6650 86400 5 8 0 1 0 2 1 pintype=out } P 6600 86000 6300 86000 1 0 1 { T 6500 86050 5 8 1 1 0 6 1 pinnumber=8 T 6500 85950 5 8 0 1 0 8 1 pinseq=8 T 6650 86000 5 8 1 1 0 0 1 pinlabel=Rx2 In T 6650 86000 5 8 0 1 0 2 1 pintype=in } P 8000 86000 8300 86000 1 0 1 { T 8100 86050 5 8 1 1 0 0 1 pinnumber=9 T 8100 85950 5 8 0 1 0 2 1 pinseq=9 T 7950 86000 5 8 1 1 0 6 1 pinlabel=Rx2 Out T 7950 86000 5 8 0 1 0 8 1 pintype=out } P 8000 86400 8300 86400 1 0 1 { T 8100 86450 5 8 1 1 0 0 1 pinnumber=10 T 8100 86350 5 8 0 1 0 2 1 pinseq=10 T 7950 86400 5 8 1 1 0 6 1 pinlabel=Tx2 In T 7950 86400 5 8 0 1 0 8 1 pintype=in } P 8000 87200 8300 87200 1 0 1 { T 8100 87250 5 8 1 1 0 0 1 pinnumber=11 T 8100 87150 5 8 0 1 0 2 1 pinseq=11 T 7950 87200 5 8 1 1 0 6 1 pinlabel=Tx1 In T 7950 87200 5 8 0 1 0 8 1 pintype=in } P 8000 86800 8300 86800 1 0 1 { T 8100 86850 5 8 1 1 0 0 1 pinnumber=12 T 8100 86750 5 8 0 1 0 2 1 pinseq=12 T 7950 86800 5 8 1 1 0 6 1 pinlabel=Rx1 Out T 7950 86800 5 8 0 1 0 8 1 pintype=out } P 6600 86800 6300 86800 1 0 1 { T 6500 86850 5 8 1 1 0 6 1 pinnumber=13 T 6500 86750 5 8 0 1 0 8 1 pinseq=13 T 6650 86800 5 8 1 1 0 0 1 pinlabel=Rx1 In T 6650 86800 5 8 0 1 0 2 1 pintype=in } P 6600 87200 6300 87200 1 0 1 { T 6500 87250 5 8 1 1 0 6 1 pinnumber=14 T 6500 87150 5 8 0 1 0 8 1 pinseq=14 T 6650 87200 5 8 1 1 0 0 1 pinlabel=Tx1 Out T 6650 87200 5 8 0 1 0 2 1 pintype=out } P 6600 88800 6300 88800 1 0 1 { T 6500 88850 5 8 1 1 0 6 1 pinnumber=1 T 6500 88750 5 8 0 1 0 8 1 pinseq=1 T 6650 88800 5 8 1 1 0 0 1 pinlabel=C1+ T 6650 88800 5 8 0 1 0 2 1 pintype=pas } B 6600 85700 1400 3500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 L 6600 87400 8000 87400 3 0 0 2 50 50 L 6600 86600 8000 86600 3 0 0 2 50 50 P 8300 88400 8000 88400 1 0 0 { T 8077 88426 5 10 1 1 0 0 1 pinnumber=15 T 8700 88400 5 10 0 0 0 0 1 pinseq=15 T 8500 88600 5 10 0 0 0 0 1 pintype=pwr T 7561 88400 5 10 1 1 0 0 1 pinlabel=GND } P 8300 88800 8000 88800 1 0 0 { T 8077 88822 5 10 1 1 0 0 1 pinnumber=16 T 8400 89000 5 10 0 0 0 0 1 pinseq=16 T 8300 89100 5 10 0 0 0 0 1 pintype=pwr T 7600 88800 5 10 1 1 0 0 1 pinlabel=Vcc } T 6737 89012 5 10 0 1 0 0 1 device=MAX232CSE T 7886 89229 8 10 0 1 0 6 1 refdes=U15 T 7000 88850 5 10 0 1 0 0 1 footprint=SO16 T 6600 89750 5 10 0 0 0 0 1 description=5V-powered dual RS-232 driver/receiver T 6600 90350 5 10 0 0 0 0 1 numslots=0 T 6600 90550 5 10 0 0 0 0 1 documentation=http://pdfserv.maxim-ic.com/en/ds/MAX220-MAX249.pdf ] { T 6638 89012 5 10 1 1 0 0 1 device=ADM3202ARU T 6486 85629 5 10 1 1 0 6 1 refdes=U6 T 6762 88623 5 10 1 1 0 0 1 footprint=DTSSOP-16 T 6300 85700 5 10 0 0 0 6 1 value=ADM3202ARU } C 6200 87800 1 0 0 EMBEDDEDcapacitor-d2.sym [ P 6200 88000 6000 88000 1 0 0 { T 6100 88050 5 8 0 1 0 6 1 pinnumber=1 T 6100 88050 5 8 0 0 0 6 1 pinseq=1 T 6200 88000 5 10 0 0 0 6 1 pinlabel=+ T 6200 88000 5 10 0 0 0 6 1 pintype=pas } P 5300 88000 5500 88000 1 0 0 { T 5500 88050 5 8 0 1 0 6 1 pinnumber=2 T 5500 88050 5 8 0 0 0 6 1 pinseq=2 T 5300 88000 5 10 0 0 0 6 1 pinlabel=- T 5300 88000 5 10 0 0 0 6 1 pintype=pas } L 5800 88200 5800 87800 3 0 0 0 -1 -1 L 5500 88000 5700 88000 3 0 0 0 -1 -1 L 5800 88000 6000 88000 3 0 0 0 -1 -1 A 5000 88000 700 345 30 3 0 0 0 -1 -1 L 5911 88200 5911 88100 3 0 0 0 -1 -1 L 5860 88149 5960 88149 3 0 0 0 -1 -1 T 6000 88900 5 10 0 0 0 6 1 device=POLARIZED_CAPACITOR T 6000 88300 8 10 0 1 0 6 1 refdes=C81 T 5900 88700 8 10 0 0 0 6 1 class=DISCRETE T 5900 88700 8 10 0 0 0 6 1 footprint=d0603 T 5900 88700 8 10 0 0 0 6 1 numslots=0 ] { T 6200 88100 5 10 1 1 0 6 1 refdes=C9 T 5600 88100 5 10 1 1 0 6 1 value=0.1uF T 5600 87800 5 10 1 1 0 6 1 footprint=d0603 } C 6200 88600 1 0 0 EMBEDDEDcapacitor-d2.sym [ P 6200 88800 6000 88800 1 0 0 { T 6100 88850 5 8 0 1 0 6 1 pinnumber=1 T 6100 88850 5 8 0 0 0 6 1 pinseq=1 T 6200 88800 5 10 0 0 0 6 1 pinlabel=+ T 6200 88800 5 10 0 0 0 6 1 pintype=pas } P 5300 88800 5500 88800 1 0 0 { T 5500 88850 5 8 0 1 0 6 1 pinnumber=2 T 5500 88850 5 8 0 0 0 6 1 pinseq=2 T 5300 88800 5 10 0 0 0 6 1 pinlabel=- T 5300 88800 5 10 0 0 0 6 1 pintype=pas } L 5800 89000 5800 88600 3 0 0 0 -1 -1 L 5500 88800 5700 88800 3 0 0 0 -1 -1 L 5800 88800 6000 88800 3 0 0 0 -1 -1 A 5000 88800 700 345 30 3 0 0 0 -1 -1 L 5911 89000 5911 88900 3 0 0 0 -1 -1 L 5860 88949 5960 88949 3 0 0 0 -1 -1 T 6000 89700 5 10 0 0 0 6 1 device=POLARIZED_CAPACITOR T 6000 89100 8 10 0 1 0 6 1 refdes=C82 T 5900 89500 8 10 0 0 0 6 1 class=DISCRETE T 5900 89500 8 10 0 0 0 6 1 footprint=d0603 T 5900 89500 8 10 0 0 0 6 1 numslots=0 ] { T 6300 89000 5 10 1 1 0 6 1 refdes=C10 T 5600 89000 5 10 1 1 0 6 1 value=0.1uF T 5600 88600 5 10 1 1 0 6 1 footprint=d0603 } C 9300 87400 1 0 0 EMBEDDEDcapacitor-d2.sym [ P 9300 87600 9100 87600 1 0 0 { T 9200 87650 5 8 0 1 0 6 1 pinnumber=1 T 9200 87650 5 8 0 0 0 6 1 pinseq=1 T 9300 87600 5 10 0 0 0 6 1 pinlabel=+ T 9300 87600 5 10 0 0 0 6 1 pintype=pas } P 8400 87600 8600 87600 1 0 0 { T 8600 87650 5 8 0 1 0 6 1 pinnumber=2 T 8600 87650 5 8 0 0 0 6 1 pinseq=2 T 8400 87600 5 10 0 0 0 6 1 pinlabel=- T 8400 87600 5 10 0 0 0 6 1 pintype=pas } L 8900 87800 8900 87400 3 0 0 0 -1 -1 L 8600 87600 8800 87600 3 0 0 0 -1 -1 L 8900 87600 9100 87600 3 0 0 0 -1 -1 A 8100 87600 700 345 30 3 0 0 0 -1 -1 L 9011 87800 9011 87700 3 0 0 0 -1 -1 L 8960 87749 9060 87749 3 0 0 0 -1 -1 T 9100 88500 5 10 0 0 0 6 1 device=POLARIZED_CAPACITOR T 9100 87900 8 10 0 1 0 6 1 refdes=C83 T 9000 88300 8 10 0 0 0 6 1 class=DISCRETE T 9000 88300 8 10 0 0 0 6 1 footprint=d0603 T 9000 88300 8 10 0 0 0 6 1 numslots=0 ] { T 9400 87700 5 10 1 1 0 6 1 refdes=C11 T 8743 87453 5 10 1 1 0 6 1 footprint=d0603 T 8723 87634 5 10 1 1 0 6 1 value=0.1uF } C 8400 87800 1 0 0 EMBEDDEDcapacitor-d2.sym [ P 8400 88000 8600 88000 1 0 0 { T 8500 88050 5 8 0 1 0 0 1 pinnumber=1 T 8500 88050 5 8 0 0 0 0 1 pinseq=1 T 8400 88000 5 10 0 0 0 0 1 pinlabel=+ T 8400 88000 5 10 0 0 0 0 1 pintype=pas } P 9300 88000 9100 88000 1 0 0 { T 9100 88050 5 8 0 1 0 0 1 pinnumber=2 T 9100 88050 5 8 0 0 0 0 1 pinseq=2 T 9300 88000 5 10 0 0 0 0 1 pinlabel=- T 9300 88000 5 10 0 0 0 0 1 pintype=pas } L 8800 88200 8800 87800 3 0 0 0 -1 -1 L 9100 88000 8900 88000 3 0 0 0 -1 -1 L 8800 88000 8600 88000 3 0 0 0 -1 -1 A 9600 88000 700 165 30 3 0 0 0 -1 -1 L 8689 88200 8689 88100 3 0 0 0 -1 -1 L 8740 88149 8640 88149 3 0 0 0 -1 -1 T 8600 88900 5 10 0 0 0 0 1 device=POLARIZED_CAPACITOR T 8600 88300 8 10 0 1 0 0 1 refdes=C84 T 8700 88700 8 10 0 0 0 0 1 class=DISCRETE T 8700 88700 8 10 0 0 0 0 1 footprint=d0603 T 8700 88700 8 10 0 0 0 0 1 numslots=0 ] { T 9000 88100 5 10 1 1 0 0 1 refdes=C12 T 8652 88170 5 10 1 1 0 6 1 value=0.1uF T 8718 87849 5 10 1 1 0 6 1 footprint=d0603 } C 8600 89700 1 0 0 EMBEDDED3.3V.sym [ P 8800 89700 8800 89900 1 0 0 { T 8850 89750 5 6 0 1 0 0 1 pinnumber=1 T 8850 89750 5 6 0 0 0 0 1 pinseq=1 } L 8650 89900 8950 89900 3 0 0 0 -1 -1 T 8675 89950 9 8 1 0 0 0 1 +3.3V T 8900 89700 8 8 0 0 0 0 1 net=+3.3V:1 ] C 4300 84800 1 0 0 EMBEDDEDgnd-1.sym [ P 4200 84900 4200 85100 1 0 1 { T 4142 84961 5 4 0 1 0 6 1 pinnumber=1 T 4142 84961 5 4 0 0 0 6 1 pinseq=1 } L 4300 84900 4100 84900 3 0 0 0 -1 -1 L 4245 84850 4155 84850 3 0 0 0 -1 -1 L 4220 84810 4180 84810 3 0 0 0 -1 -1 T 4000 84850 8 10 0 0 0 6 1 net=GND:1 ] N 8300 88000 8400 88000 4 N 8300 87600 8400 87600 4 N 6300 88800 6200 88800 4 N 6300 88400 5200 88400 4 N 5200 88400 5200 88800 4 N 5200 88800 5300 88800 4 N 5300 88000 5200 88000 4 N 5200 88000 5200 87600 4 N 5200 87600 6300 87600 4 N 8300 88800 9400 88800 4 N 8800 88800 8800 89700 4 N 9300 88000 9400 88000 4 N 9400 88000 9400 88800 4 N 9300 87600 9600 87600 4 N 8300 88400 9600 88400 4 N 6200 88000 6300 88000 4 N 8300 86800 10900 86800 4 { T 10895 86842 5 10 1 1 180 2 1 netname=RX } N 8300 87200 10900 87200 4 { T 10895 87242 5 10 1 1 180 2 1 netname=TX } C 10900 87200 1 270 0 EMBEDDEDbusripper-1.sym [ P 10900 87200 11000 87300 1 0 0 { T 11400 87200 5 8 0 0 90 2 1 pinseq=1 T 11500 87200 5 8 0 0 90 2 1 pinnumber=1 T 11600 87200 5 8 0 0 90 2 1 pintype=pas T 11700 87200 5 8 0 0 90 2 1 pinlabel=netside } L 11100 87400 11000 87300 10 30 0 0 -1 -1 T 11300 87200 5 8 0 0 90 2 1 device=none T 11200 87200 5 8 0 0 90 2 1 graphical=1 ] C 10900 86800 1 270 0 EMBEDDEDbusripper-1.sym [ P 10900 86800 11000 86900 1 0 0 { T 11400 86800 5 8 0 0 90 2 1 pinseq=1 T 11500 86800 5 8 0 0 90 2 1 pinnumber=1 T 11600 86800 5 8 0 0 90 2 1 pintype=pas T 11700 86800 5 8 0 0 90 2 1 pinlabel=netside } L 11100 87000 11000 86900 10 30 0 0 -1 -1 T 11300 86800 5 8 0 0 90 2 1 device=none T 11200 86800 5 8 0 0 90 2 1 graphical=1 ] N 9600 88500 9600 87600 4 C 9400 89400 1 270 0 EMBEDDEDcapacitor-d2.sym [ P 9600 89400 9600 89200 1 0 0 { T 9650 89300 5 8 0 1 90 8 1 pinnumber=1 T 9650 89300 5 8 0 0 90 8 1 pinseq=1 T 9600 89400 5 10 0 0 90 8 1 pinlabel=+ T 9600 89400 5 10 0 0 90 8 1 pintype=pas } P 9600 88500 9600 88700 1 0 0 { T 9650 88700 5 8 0 1 90 8 1 pinnumber=2 T 9650 88700 5 8 0 0 90 8 1 pinseq=2 T 9600 88500 5 10 0 0 90 8 1 pinlabel=- T 9600 88500 5 10 0 0 90 8 1 pintype=pas } L 9800 89000 9400 89000 3 0 0 0 -1 -1 L 9600 88700 9600 88900 3 0 0 0 -1 -1 L 9600 89000 9600 89200 3 0 0 0 -1 -1 A 9600 88200 700 75 30 3 0 0 0 -1 -1 L 9800 89111 9700 89111 3 0 0 0 -1 -1 L 9749 89060 9749 89160 3 0 0 0 -1 -1 T 10500 89200 5 10 0 0 90 8 1 device=POLARIZED_CAPACITOR T 9900 89200 8 10 0 1 90 8 1 refdes=C85 T 10300 89100 8 10 0 0 90 8 1 class=DISCRETE T 10300 89100 8 10 0 0 90 8 1 footprint=d0603 T 10300 89100 8 10 0 0 90 8 1 numslots=0 ] { T 9700 88800 5 10 1 1 90 8 1 refdes=C13 T 9770 89148 5 10 1 1 90 2 1 value=0.1uF T 9448 89019 5 10 1 1 90 2 1 footprint=d0603 } C 9500 87300 1 0 0 EMBEDDEDgnd-1.sym [ P 9400 87400 9400 87600 1 0 1 { T 9342 87461 5 4 0 1 0 6 1 pinnumber=1 T 9342 87461 5 4 0 0 0 6 1 pinseq=1 } L 9500 87400 9300 87400 3 0 0 0 -1 -1 L 9445 87350 9355 87350 3 0 0 0 -1 -1 L 9420 87310 9380 87310 3 0 0 0 -1 -1 T 9200 87350 8 10 0 0 0 6 1 net=GND:1 ] N 9600 89400 9600 89600 4 N 9600 89600 8800 89600 4 N 6300 87200 4000 87200 4 N 4000 86600 5600 86600 4 N 5600 86600 5800 86800 4 N 5800 86800 6300 86800 4 N 4000 87800 4600 87800 4 N 4600 87500 4000 87500 4 N 4600 86000 4600 87800 4 N 4600 86000 4000 86000 4 C 5200 85600 1 0 1 nc-left-1.sym { T 4915 85850 5 10 0 0 0 6 1 value=NoConnection T 5200 86400 5 10 0 0 0 6 1 device=DRC_Directive } C 2800 85100 1 0 0 bf-DB9F.sym { T 2800 85000 5 10 1 1 0 0 1 refdes=J8 T 4300 88500 5 10 1 1 0 6 1 description=DB9 Female RA T 2800 85100 5 10 0 1 0 6 1 footprint=CON_DSUB_9F__AMP_747844 T 2800 85100 5 10 0 0 0 6 1 value=DB9 Female RA } N 4700 85700 4000 85700 4 N 4200 88100 4000 88100 4 N 4200 85100 4200 88100 4 N 4000 85400 4200 85400 4 N 4200 85200 4000 85200 4 N 11100 89200 11700 89200 4 { T 11600 89250 5 10 1 1 0 6 1 netname=nCS1 } N 11100 88900 11700 88900 4 { T 11600 88975 5 10 1 1 0 6 1 netname=nCS2 } N 11700 88600 11100 88600 4 { T 11600 88677 5 10 1 1 0 6 1 netname=nCS3 } N 11700 88300 11100 88300 4 { T 11600 88377 5 10 1 1 0 6 1 netname=nCS4 } C 12600 89100 1 0 1 bf-resistor-1.sym { T 12500 89400 5 10 1 1 180 6 1 refdes=R40 T 12600 89100 5 10 0 0 0 6 1 footprint=bf_0603 T 11700 89400 5 10 1 1 180 6 1 value=0 T 12600 89100 5 10 0 0 270 2 1 comment=0.125W 5% } C 12600 88800 1 0 1 bf-resistor-1.sym { T 12500 89100 5 10 1 1 180 6 1 refdes=R41 T 12600 88800 5 10 0 0 0 6 1 footprint=bf_0603 T 11700 89100 5 10 1 1 180 6 1 value=0 T 12600 88800 5 10 0 0 270 2 1 comment=0.125W 5% } C 12600 88500 1 0 1 bf-resistor-1.sym { T 12500 88800 5 10 1 1 180 6 1 refdes=R42 T 12600 88500 5 10 0 0 0 6 1 footprint=bf_0603 T 11700 88800 5 10 1 1 180 6 1 value=0 T 12600 88500 5 10 0 0 270 2 1 comment=0.125W 5% } C 12600 88200 1 0 1 bf-resistor-1.sym { T 12500 88500 5 10 1 1 180 6 1 refdes=R43 T 12600 88200 5 10 0 0 0 6 1 footprint=bf_0603 T 11700 88500 5 10 1 1 180 6 1 value=0 T 12600 88200 5 10 0 0 270 2 1 comment=0.125W 5% } N 12800 88600 12600 88600 4 N 13000 89200 12600 89200 4 N 13100 89300 13000 89200 4 N 13100 89100 12900 88900 4 N 12900 88900 12600 88900 4 N 13100 88900 12800 88600 4 N 13100 88700 12700 88300 4 N 12700 88300 12600 88300 4 C 19400 87600 1 0 1 nc-left-1.sym { T 19115 87850 5 10 0 0 0 6 1 value=NoConnection T 5600 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 5800 84700 1 0 0 nc-left-1.sym { T 6085 84950 5 10 0 0 0 0 1 value=NoConnection T 5800 85500 5 10 0 0 0 0 1 device=DRC_Directive } C 5800 84500 1 0 0 nc-left-1.sym { T 6085 84750 5 10 0 0 0 0 1 value=NoConnection T 5800 85300 5 10 0 0 0 0 1 device=DRC_Directive } C 5800 84300 1 0 0 nc-left-1.sym { T 6085 84550 5 10 0 0 0 0 1 value=NoConnection T 5800 85100 5 10 0 0 0 0 1 device=DRC_Directive } C 8800 85900 1 0 1 nc-left-1.sym { T 8515 86150 5 10 0 0 0 6 1 value=NoConnection T 8800 86700 5 10 0 0 0 6 1 device=DRC_Directive } N 22300 80100 23300 80100 4 { T 23195 80142 5 10 1 1 180 2 1 netname=PPI_CLK } N 22300 79900 23300 79900 4 { T 23195 79942 5 10 1 1 180 2 1 netname=PPI0 } N 22300 79700 23300 79700 4 { T 23195 79742 5 10 1 1 180 2 1 netname=PPI1 } N 22300 79500 23300 79500 4 { T 23195 79542 5 10 1 1 180 2 1 netname=PPI2 } N 22300 79300 23300 79300 4 { T 23195 79342 5 10 1 1 180 2 1 netname=PPI3 } N 22300 79100 23300 79100 4 { T 23195 79142 5 10 1 1 180 2 1 netname=PF15 } N 22300 78900 23300 78900 4 { T 23195 78942 5 10 1 1 180 2 1 netname=PF14 } N 22300 78700 23300 78700 4 { T 23195 78742 5 10 1 1 180 2 1 netname=PF13 } N 22300 78500 23300 78500 4 { T 23195 78542 5 10 1 1 180 2 1 netname=nCSB } N 22300 78300 23300 78300 4 { T 23195 78342 5 10 1 1 180 2 1 netname=PF11 } N 22300 78100 23300 78100 4 { T 23195 78142 5 10 1 1 180 2 1 netname=PF10 } N 22300 77900 23300 77900 4 { T 23195 77942 5 10 1 1 180 2 1 netname=PF9 } N 22300 77700 23300 77700 4 { T 23195 77742 5 10 1 1 180 2 1 netname=PF8 } N 22300 77500 23300 77500 4 { T 23195 77542 5 10 1 1 180 2 1 netname=PF7 } N 22300 77300 23300 77300 4 { T 23195 77342 5 10 1 1 180 2 1 netname=PF6 } N 22300 77100 23300 77100 4 { T 23195 77142 5 10 1 1 180 2 1 netname=PF5 } N 22300 76500 23300 76500 4 { T 23295 76542 5 10 1 1 180 2 1 netname=SPIFLASH } N 22300 76300 23300 76300 4 { T 23195 76342 5 10 1 1 180 2 1 netname=PF1 } N 22300 76100 23300 76100 4 { T 23195 76142 5 10 1 1 180 2 1 netname=PF0 } N 22300 75900 22600 75900 4 C 21500 75800 1 0 0 bf-header24-1.sym { T 21550 80550 5 10 1 1 0 0 1 refdes=GPIO T 21900 83300 5 10 0 0 0 0 1 footprint=dheader_12x2_100_mils T 21900 83700 5 10 0 0 0 0 1 device=header24 } N 22300 80500 23500 80500 4 N 22300 80300 23500 80300 4 C 20800 75500 1 0 0 EMBEDDEDgnd-1.sym [ P 20900 75600 20900 75800 1 0 1 { T 20958 75661 5 4 0 1 0 0 1 pinnumber=1 T 20958 75661 5 4 0 0 0 0 1 pinseq=1 } L 20800 75600 21000 75600 3 0 0 0 -1 -1 L 20855 75550 20945 75550 3 0 0 0 -1 -1 L 20880 75510 20920 75510 3 0 0 0 -1 -1 T 21100 75550 8 10 0 0 0 0 1 net=GND:1 ] C 20500 78300 1 0 0 EMBEDDED3.3V.sym [ P 20700 78300 20700 78500 1 0 0 { T 20750 78350 5 6 0 1 0 0 1 pinnumber=1 T 20750 78350 5 6 0 0 0 0 1 pinseq=1 } L 20550 78500 20850 78500 3 0 0 0 -1 -1 T 20575 78550 9 8 1 0 0 0 1 +3.3V T 20800 78300 8 8 0 0 0 0 1 net=+3.3V:1 ] N 20600 76700 20900 76700 4 C 22800 75700 1 0 0 EMBEDDED3.3V.sym [ P 23000 75700 23000 75900 1 0 0 { T 23050 75750 5 6 0 1 0 0 1 pinnumber=1 T 23050 75750 5 6 0 0 0 0 1 pinseq=1 } L 22850 75900 23150 75900 3 0 0 0 -1 -1 T 22875 75950 9 8 1 0 0 0 1 +3.3V T 23100 75700 8 8 0 0 0 0 1 net=+3.3V:1 ] C 23400 80000 1 0 0 EMBEDDEDgnd-1.sym [ P 23500 80100 23500 80300 1 0 1 { T 23558 80161 5 4 0 1 0 0 1 pinnumber=1 T 23558 80161 5 4 0 0 0 0 1 pinseq=1 } L 23400 80100 23600 80100 3 0 0 0 -1 -1 L 23455 80050 23545 80050 3 0 0 0 -1 -1 L 23480 80010 23520 80010 3 0 0 0 -1 -1 T 23700 80050 8 10 0 0 0 0 1 net=GND:1 ] N 23500 80300 23500 80500 4 C 2500 88000 1 0 0 EMBEDDEDdpad-l.sym [ P 2100 88200 1800 88200 1 0 1 { T 1939 88230 5 10 1 1 0 6 1 pinnumber=1 T 2100 88200 5 10 0 0 0 6 1 pinseq=1 T 2100 88200 5 10 0 0 0 6 1 pintype=pas T 2100 88200 5 10 0 0 0 6 1 pinlabel=1 } V 2300 88200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 2300 88200 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 2500 88500 8 10 0 1 0 6 1 refdes=pad7 T 2300 88700 8 10 0 0 0 6 1 numslots=0 T 2400 89100 8 10 0 0 0 6 1 description=PAD T 2400 88900 8 10 0 0 0 6 1 device=PAD ] { T 2500 88500 5 10 1 1 0 6 1 refdes=pad6 T 2500 88000 5 10 0 0 0 0 1 footprint=dpad-3mm } C 900 88000 1 0 0 EMBEDDEDdpad-l.sym [ P 1300 88200 1600 88200 1 0 1 { T 1461 88230 5 10 1 1 0 0 1 pinnumber=1 T 1300 88200 5 10 0 0 0 0 1 pinseq=1 T 1300 88200 5 10 0 0 0 0 1 pintype=pas T 1300 88200 5 10 0 0 0 0 1 pinlabel=1 } V 1100 88200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 V 1100 88200 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 900 88500 8 10 0 1 0 0 1 refdes=pad8 T 1100 88700 8 10 0 0 0 0 1 numslots=0 T 1000 89100 8 10 0 0 0 0 1 description=PAD T 1000 88900 8 10 0 0 0 0 1 device=PAD ] { T 900 88500 5 10 1 1 0 0 1 refdes=pad5 T 900 88000 5 10 0 0 0 0 1 footprint=dpad-3mm } N 1600 88200 1800 88200 4 N 1700 88100 1700 88200 4 N 22300 76900 23300 76900 4 { T 23195 76942 5 10 1 1 180 2 1 netname=nRST } N 22300 76700 23300 76700 4 { T 23195 76742 5 10 1 1 180 2 1 netname=nCSA } N 22600 75900 22600 75700 4 N 22600 75700 23000 75700 4 N 13400 88300 14600 88300 4 { T 13488 88340 5 10 1 1 0 0 1 netname=SCLK } N 13400 88100 14600 88100 4 { T 13488 88139 5 10 1 1 0 0 1 netname=SDO } N 13400 87900 14600 87900 4 { T 13489 87933 5 10 1 1 0 0 1 netname=SDI } N 18000 76100 18000 76800 4 T 16600 74500 9 10 1 0 0 0 1 bf1_mem.sch T 17000 74200 9 10 1 0 0 0 1 2 T 18600 74200 9 10 1 0 0 0 1 3 T 16600 74800 9 10 1 0 0 0 1 IP04 Four Port IP-PBX T 20600 74500 9 10 1 0 0 0 1 $Revision$ T 20600 74200 9 10 1 0 0 0 1 David Rowe & BlackfinOne Team T 15200 75600 1 20 1 0 0 0 1 SERIAL FLASH T 16800 83400 1 20 1 0 0 0 2 32M or 64M SDRAM T 15300 89700 1 20 1 0 0 0 1 CPLD T 8900 85300 1 20 1 0 0 6 1 ETHERNET T 13100 83400 1 20 1 0 0 0 2 16-256MB NAND FLASH T 6700 89500 1 20 1 0 0 0 1 RS232 T 1100 76300 9 10 1 0 0 0 1 Just mount one of these, adjust to minimise EMI N 8600 86400 8300 86400 4 C 12500 76700 1 0 0 EMBEDDED3.3V.sym [ P 12300 76700 12300 76900 1 0 0 { T 12250 76750 5 6 0 1 0 6 1 pinnumber=1 T 12250 76750 5 6 0 0 0 6 1 pinseq=1 } L 12450 76900 12150 76900 3 0 0 0 -1 -1 T 12425 76950 9 8 1 0 0 6 1 +3.3V T 12200 76700 8 8 0 0 0 6 1 net=+3.3V:1 ] C 12700 76200 1 0 0 EMBEDDEDgnd-1.sym [ P 12600 76300 12600 76500 1 0 1 { T 12542 76361 5 4 0 1 0 6 1 pinnumber=1 T 12542 76361 5 4 0 0 0 6 1 pinseq=1 } L 12700 76300 12500 76300 3 0 0 0 -1 -1 L 12645 76250 12555 76250 3 0 0 0 -1 -1 L 12620 76210 12580 76210 3 0 0 0 -1 -1 T 12400 76250 8 10 0 0 0 6 1 net=GND:1 ] N 16400 76800 14300 76800 4 { T 16341 76842 5 10 1 1 0 6 1 netname=SPIFLASH } N 14300 77000 16400 77000 4 { T 16359 77042 5 10 1 1 0 6 1 netname=SCLK } N 14300 77200 16400 77200 4 { T 16359 77242 5 10 1 1 0 6 1 netname=SDI } C 14500 76400 1 0 0 EMBEDDED3.3V.sym [ P 14700 76400 14700 76600 1 0 0 { T 14750 76450 5 6 0 1 0 0 1 pinnumber=1 T 14750 76450 5 6 0 0 0 0 1 pinseq=1 } L 14550 76600 14850 76600 3 0 0 0 -1 -1 T 14575 76650 9 8 1 0 0 0 1 +3.3V T 14800 76400 8 8 0 0 0 0 1 net=+3.3V:1 ] N 12600 77200 12500 77200 4 N 12500 77200 12500 77400 4 N 12500 77400 16400 77400 4 { T 16359 77442 5 10 1 1 0 6 1 netname=SDO } N 14400 76400 14400 76600 4 N 14400 76600 14300 76600 4 C 16400 77400 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 77400 16500 77500 1 0 0 { T 16900 77400 5 8 0 0 90 2 1 pinseq=1 T 17000 77400 5 8 0 0 90 2 1 pinnumber=1 T 17100 77400 5 8 0 0 90 2 1 pintype=pas T 17200 77400 5 8 0 0 90 2 1 pinlabel=netside } L 16600 77600 16500 77500 10 30 0 0 -1 -1 T 16800 77400 5 8 0 0 90 2 1 device=none T 16700 77400 5 8 0 0 90 2 1 graphical=1 ] C 16400 77200 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 77200 16500 77300 1 0 0 { T 16900 77200 5 8 0 0 90 2 1 pinseq=1 T 17000 77200 5 8 0 0 90 2 1 pinnumber=1 T 17100 77200 5 8 0 0 90 2 1 pintype=pas T 17200 77200 5 8 0 0 90 2 1 pinlabel=netside } L 16600 77400 16500 77300 10 30 0 0 -1 -1 T 16800 77200 5 8 0 0 90 2 1 device=none T 16700 77200 5 8 0 0 90 2 1 graphical=1 ] C 16400 77000 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 77000 16500 77100 1 0 0 { T 16900 77000 5 8 0 0 90 2 1 pinseq=1 T 17000 77000 5 8 0 0 90 2 1 pinnumber=1 T 17100 77000 5 8 0 0 90 2 1 pintype=pas T 17200 77000 5 8 0 0 90 2 1 pinlabel=netside } L 16600 77200 16500 77100 10 30 0 0 -1 -1 T 16800 77000 5 8 0 0 90 2 1 device=none T 16700 77000 5 8 0 0 90 2 1 graphical=1 ] C 16400 76800 1 270 0 EMBEDDEDbusripper-1.sym [ P 16400 76800 16500 76900 1 0 0 { T 16900 76800 5 8 0 0 90 2 1 pinseq=1 T 17000 76800 5 8 0 0 90 2 1 pinnumber=1 T 17100 76800 5 8 0 0 90 2 1 pintype=pas T 17200 76800 5 8 0 0 90 2 1 pinlabel=netside } L 16600 77000 16500 76900 10 30 0 0 -1 -1 T 16800 76800 5 8 0 0 90 2 1 device=none T 16700 76800 5 8 0 0 90 2 1 graphical=1 ] N 14700 76400 14300 76400 4 N 12600 76700 12300 76700 4 N 9100 76700 9600 76700 4 C 15300 75300 1 0 1 m25p20.sym { T 13350 76112 5 8 1 1 0 6 1 refdes=U3A T 13665 75918 5 8 1 1 0 6 1 value=M25P20 T 13693 76322 5 8 1 1 0 6 1 footprint=SO-8 } T 10750 74250 9 10 1 0 0 0 5 Load EITHER U3A OR U3 (but not both). M25P20 is a 256k x 8 used sufficent for holding u-boot, which then boots uClinux from NAND flash. M25P64 is an 8Mbyte chip that can hold u-boot & uClinux e.g. for systems without NAND flash. C 14100 87600 1 0 0 nc-left-1.sym { T 14385 87850 5 10 0 0 0 0 1 value=NoConnection T 14100 88400 5 10 0 0 0 0 1 device=DRC_Directive } C 14100 87400 1 0 0 nc-left-1.sym { T 14385 87650 5 10 0 0 0 0 1 value=NoConnection T 14100 88200 5 10 0 0 0 0 1 device=DRC_Directive } C 13100 85200 1 0 0 nc-left-1.sym { T 13385 85450 5 10 0 0 0 0 1 value=NoConnection T 13100 86000 5 10 0 0 0 0 1 device=DRC_Directive } N 14600 86100 13400 86100 4 { T 13506 86141 5 10 1 1 0 0 1 netname=DR1 } N 17300 87300 19100 87300 4 { T 18388 87329 5 10 1 1 0 0 1 netname=DT1 } N 14600 85300 13600 85300 4 C 13100 86600 1 0 0 nc-left-1.sym { T 13385 86850 5 10 0 0 0 0 1 value=NoConnection T 13100 87400 5 10 0 0 0 0 1 device=DRC_Directive } C 12500 75800 1 90 0 EMBEDDEDcapacitor-d1.sym [ P 12300 75800 12300 76000 1 0 0 { T 12250 75900 5 8 0 1 90 0 1 pinnumber=1 T 12250 75900 5 8 0 0 90 0 1 pinseq=1 T 12300 75800 5 10 0 0 90 0 1 pinlabel=pin1 T 12300 75800 5 10 0 0 90 0 1 pintype=pas } P 12300 76700 12300 76500 1 0 0 { T 12250 76500 5 8 0 1 90 0 1 pinnumber=2 T 12250 76500 5 8 0 0 90 0 1 pinseq=2 T 12300 76700 5 10 0 0 90 0 1 pintype=pas T 12300 76700 5 10 0 0 90 0 1 pinlabel=pin2 } L 12129 76200 12470 76200 3 0 0 0 -1 -1 L 12128 76300 12468 76300 3 0 0 0 -1 -1 L 12300 76500 12300 76300 3 0 0 0 -1 -1 L 12300 76200 12300 76000 3 0 0 0 -1 -1 T 11900 76100 5 10 0 0 90 0 1 device=CAPACITOR T 12000 76000 8 10 0 1 90 0 1 refdes=C144 T 11700 76000 8 10 0 0 90 0 1 class=DISCRETE T 11500 76300 8 10 0 0 90 0 1 numslots=0 T 11300 76100 8 10 0 0 90 0 1 footprint=d0603 ] { T 12182 76077 5 10 1 1 180 0 1 refdes=C129 T 12188 75879 5 10 1 1 180 0 1 value=100nF T 12991 75656 5 10 0 1 180 0 1 footprint=d0603 } C 12400 75500 1 0 0 EMBEDDEDgnd-1.sym [ P 12300 75600 12300 75800 1 0 1 { T 12242 75661 5 4 0 1 0 6 1 pinnumber=1 T 12242 75661 5 4 0 0 0 6 1 pinseq=1 } L 12400 75600 12200 75600 3 0 0 0 -1 -1 L 12345 75550 12255 75550 3 0 0 0 -1 -1 L 12320 75510 12280 75510 3 0 0 0 -1 -1 T 12100 75550 8 10 0 0 0 6 1 net=GND:1 ] C 5800 86300 1 0 0 nc-left-1.sym { T 6085 86550 5 10 0 0 0 0 1 value=NoConnection T 5800 87100 5 10 0 0 0 0 1 device=DRC_Directive } C 5800 85900 1 0 0 nc-left-1.sym { T 6085 86150 5 10 0 0 0 0 1 value=NoConnection T 5800 86700 5 10 0 0 0 0 1 device=DRC_Directive } C 5200 86800 1 0 1 nc-left-1.sym { T 4915 87050 5 10 0 0 0 6 1 value=NoConnection T 5200 87600 5 10 0 0 0 6 1 device=DRC_Directive } C 5200 86200 1 0 1 nc-left-1.sym { T 4915 86450 5 10 0 0 0 6 1 value=NoConnection T 5200 87000 5 10 0 0 0 6 1 device=DRC_Directive } N 4700 86300 4000 86300 4 N 4000 86900 4700 86900 4 C 13400 86200 1 0 1 bf-resistor-1.sym { T 12500 86700 5 10 1 1 180 6 1 refdes=R135 T 13400 86200 5 10 0 0 0 6 1 footprint=bf_0603 T 12500 86500 5 10 1 1 180 6 1 value=0 T 13400 86200 5 10 0 0 270 2 1 comment=0.125W 5% } N 14600 86300 13400 86300 4 C 13400 85400 1 0 1 bf-resistor-1.sym { T 12500 85900 5 10 1 1 180 6 1 refdes=R134 T 13400 85400 5 10 0 0 0 6 1 footprint=bf_0603 T 12500 85700 5 10 1 1 180 6 1 value=0 T 13400 85400 5 10 0 0 270 2 1 comment=0.125W 5% } N 14600 85500 13400 85500 4 C 8700 86100 1 0 0 EMBEDDEDgnd-1.sym [ P 8600 86200 8600 86400 1 0 1 { T 8542 86261 5 4 0 1 0 6 1 pinnumber=1 T 8542 86261 5 4 0 0 0 6 1 pinseq=1 } L 8700 86200 8500 86200 3 0 0 0 -1 -1 L 8645 86150 8555 86150 3 0 0 0 -1 -1 L 8620 86110 8580 86110 3 0 0 0 -1 -1 T 8400 86150 8 10 0 0 0 6 1 net=GND:1 ]