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OF
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ip04_cpu.sch
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IP04 Four Port IP-PBX
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$Revision$
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C 18700 78800 1 90 0 EMBEDDEDcrystal-d1.sym
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C 6200 77000 1 90 0 EMBEDDEDcapacitor-d1.sym
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T 8800 76100 5 10 0 0 90 0 1
device=CAPACITOR
T 8900 76000 8 10 0 1 90 0 1
refdes=C60
T 8600 76000 8 10 0 0 90 0 1
class=DISCRETE
T 8400 76300 8 10 0 0 90 0 1
numslots=0
T 8200 76100 8 10 0 0 90 0 1
footprint=d0603
]
{
T 9177 75818 5 10 1 1 90 0 1
refdes=C35
T 9179 76312 5 10 1 1 90 0 1
value=100nF
T 9356 76309 5 10 1 1 90 0 1
footprint=bf_0603
}
N 9200 75700 4800 75700 4
N 7600 75700 7600 75600 4
N 13200 78200 13200 78300 4
N 18600 79500 18600 79700 4
N 18600 78800 18600 78600 4
C 19800 76400 1 0 0 EMBEDDEDgnd-1.sym
[
P 19900 76500 19900 76700 1 0 1
{
T 19958 76561 5 4 0 1 0 0 1
pinnumber=1
T 19958 76561 5 4 0 0 0 0 1
pinseq=1
}
L 19800 76500 20000 76500 3 0 0 0 -1 -1
L 19855 76450 19945 76450 3 0 0 0 -1 -1
L 19880 76410 19920 76410 3 0 0 0 -1 -1
T 20100 76450 8 10 0 0 0 0 1
net=GND:1
]
T 19200 85234 9 10 1 0 0 0 1
J2
T 19600 85234 9 10 1 0 0 0 1
J1
T 20000 85234 9 10 1 0 0 0 1
Description
T 19200 84900 9 10 1 0 0 0 1
on
T 19600 84650 9 10 1 0 0 0 1
off
T 20013 85034 9 10 1 0 0 0 1
Execute from 16-bit external memory
T 20000 84636 9 10 1 0 0 0 1
Boot from 8-bit or 16-bit FLASH
T 20007 84428 9 10 1 0 0 0 1
Boot from SPI host slave mode
T 20000 84233 9 10 1 0 0 0 1
Boot from SPI serial EEPROM
T 20013 84834 9 10 1 0 0 0 1
(bypass boot rom)
T 19600 84250 9 10 1 0 0 0 1
off
T 19200 84250 9 10 1 0 0 0 1
off
T 19200 84450 9 10 1 0 0 0 1
off
T 19600 84900 9 10 1 0 0 0 1
on
T 19200 84653 9 10 1 0 0 0 1
on
T 19600 84453 9 10 1 0 0 0 1
on
T 15687 77920 5 10 0 1 0 0 1
footprint=d0603
T 15687 77720 5 10 0 1 0 0 1
footprint=d0603
T 15687 77520 5 10 0 1 0 0 1
footprint=d0603
T 15687 77320 5 10 0 1 0 0 1
footprint=d0603
T 15687 77120 5 10 0 1 0 0 1
footprint=d0603
T 15687 76920 5 10 0 1 0 0 1
footprint=d0603
T 15687 76720 5 10 0 1 0 0 1
footprint=d0603
T 15687 76520 5 10 0 1 0 0 1
footprint=d0603
T 15687 76320 5 10 0 1 0 0 1
footprint=d0603
T 15687 76120 5 10 0 1 0 0 1
footprint=d0603
T 15687 75920 5 10 0 1 0 0 1
footprint=d0603
T 15687 78120 5 10 0 1 0 0 1
footprint=d0603
U 700 79900 700 90100 10 0
U 14400 90100 18800 90100 10 0
C 7500 75300 1 0 0 EMBEDDEDgnd-1.sym
[
P 7600 75400 7600 75600 1 0 1
{
T 7658 75461 5 4 0 1 0 0 1
pinnumber=1
T 7658 75461 5 4 0 0 0 0 1
pinseq=1
}
L 7500 75400 7700 75400 3 0 0 0 -1 -1
L 7555 75350 7645 75350 3 0 0 0 -1 -1
L 7580 75310 7620 75310 3 0 0 0 -1 -1
T 7800 75350 8 10 0 0 0 0 1
net=GND:1
]
C 19000 86600 1 90 0 EMBEDDEDbusripper-1.sym
[
T 18600 86600 5 8 0 0 90 0 1
device=none
P 19000 86600 18900 86700 1 0 0
{
T 18500 86600 5 8 0 0 90 0 1
pinseq=1
T 18400 86600 5 8 0 0 90 0 1
pinnumber=1
T 18300 86600 5 8 0 0 90 0 1
pintype=pas
T 18200 86600 5 8 0 0 90 0 1
pinlabel=netside
}
T 18700 86600 5 8 0 0 90 0 1
graphical=1
L 18800 86800 18900 86700 10 30 0 0 -1 -1
]
C 2700 88200 1 90 0 EMBEDDEDresistor-d.sym
[
P 2600 89100 2600 88950 1 0 0
{
T 2550 89000 5 8 0 1 90 0 1
pinnumber=2
T 2550 89000 5 8 0 0 90 0 1
pinseq=2
T 2550 89000 5 8 0 1 90 0 1
pintype=pas
T 2550 89000 5 8 0 0 90 0 1
pinlabel=2
}
P 2600 88200 2600 88352 1 0 0
{
T 2550 88300 5 8 0 1 90 0 1
pinnumber=1
T 2550 88300 5 8 0 0 90 0 1
pinseq=1
T 2550 88300 5 8 0 1 90 0 1
pintype=pas
T 2550 88300 5 8 0 0 90 0 1
pinlabel=1
}
B 2500 88350 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 2350 88600 5 10 0 0 90 0 1
device=RESISTOR
T 2400 88400 8 10 0 1 90 0 1
refdes=R46
T 2350 88600 5 10 0 0 90 0 1
footprint=d0603
T 2350 88600 5 10 0 0 90 0 1
numslots=0
]
{
T 3110 88890 5 10 1 1 180 0 1
refdes=R38
T 2668 88432 5 10 1 1 90 0 1
value=10k
T 2480 88187 5 10 0 1 90 0 1
footprint=d0603
}
N 2600 87900 2600 88200 4
N 2600 89100 2600 89300 4
C 2400 89300 1 0 0 EMBEDDED3.3V.sym
[
P 2600 89300 2600 89500 1 0 0
{
T 2650 89350 5 6 0 1 0 0 1
pinnumber=1
T 2650 89350 5 6 0 0 0 0 1
pinseq=1
}
L 2450 89500 2750 89500 3 0 0 0 -1 -1
T 2475 89550 9 8 1 0 0 0 1
+3.3V
T 2700 89300 8 8 0 0 0 0 1
net=+3.3V:1
]
C 3000 74800 1 90 0 EMBEDDEDcapacitor-d1.sym
[
P 2800 74800 2800 75000 1 0 0
{
T 2750 74900 5 8 0 1 90 0 1
pinnumber=1
T 2750 74900 5 8 0 0 90 0 1
pinseq=1
T 2800 74800 5 10 0 0 90 0 1
pinlabel=pin1
T 2800 74800 5 10 0 0 90 0 1
pintype=pas
}
P 2800 75700 2800 75500 1 0 0
{
T 2750 75500 5 8 0 1 90 0 1
pinnumber=2
T 2750 75500 5 8 0 0 90 0 1
pinseq=2
T 2800 75700 5 10 0 0 90 0 1
pintype=pas
T 2800 75700 5 10 0 0 90 0 1
pinlabel=pin2
}
L 2629 75200 2970 75200 3 0 0 0 -1 -1
L 2628 75300 2968 75300 3 0 0 0 -1 -1
L 2800 75500 2800 75300 3 0 0 0 -1 -1
L 2800 75200 2800 75000 3 0 0 0 -1 -1
T 2400 75100 5 10 0 0 90 0 1
device=CAPACITOR
T 2500 75000 8 10 0 1 90 0 1
refdes=C62
T 2200 75000 8 10 0 0 90 0 1
class=DISCRETE
T 2000 75300 8 10 0 0 90 0 1
numslots=0
T 1800 75100 8 10 0 0 90 0 1
footprint=d0603
]
{
T 2777 74818 5 10 1 1 90 0 1
refdes=C69
T 2779 75312 5 10 1 1 90 0 1
value=1uF bulk
T 2956 75309 5 10 1 1 90 0 1
footprint=d1206
}
C 3500 74800 1 90 0 EMBEDDEDcapacitor-d1.sym
[
P 3300 74800 3300 75000 1 0 0
{
T 3250 74900 5 8 0 1 90 0 1
pinnumber=1
T 3250 74900 5 8 0 0 90 0 1
pinseq=1
T 3300 74800 5 10 0 0 90 0 1
pinlabel=pin1
T 3300 74800 5 10 0 0 90 0 1
pintype=pas
}
P 3300 75700 3300 75500 1 0 0
{
T 3250 75500 5 8 0 1 90 0 1
pinnumber=2
T 3250 75500 5 8 0 0 90 0 1
pinseq=2
T 3300 75700 5 10 0 0 90 0 1
pintype=pas
T 3300 75700 5 10 0 0 90 0 1
pinlabel=pin2
}
L 3129 75200 3470 75200 3 0 0 0 -1 -1
L 3128 75300 3468 75300 3 0 0 0 -1 -1
L 3300 75500 3300 75300 3 0 0 0 -1 -1
L 3300 75200 3300 75000 3 0 0 0 -1 -1
T 2900 75100 5 10 0 0 90 0 1
device=CAPACITOR
T 3000 75000 8 10 0 1 90 0 1
refdes=C63
T 2700 75000 8 10 0 0 90 0 1
class=DISCRETE
T 2500 75300 8 10 0 0 90 0 1
numslots=0
T 2300 75100 8 10 0 0 90 0 1
footprint=d0603
]
{
T 3277 74818 5 10 1 1 90 0 1
refdes=C70
T 3279 75312 5 10 1 1 90 0 1
value=1uF bulk
T 3456 75309 5 10 1 1 90 0 1
footprint=d1206
}
C 4000 74800 1 90 0 EMBEDDEDcapacitor-d1.sym
[
P 3800 74800 3800 75000 1 0 0
{
T 3750 74900 5 8 0 1 90 0 1
pinnumber=1
T 3750 74900 5 8 0 0 90 0 1
pinseq=1
T 3800 74800 5 10 0 0 90 0 1
pinlabel=pin1
T 3800 74800 5 10 0 0 90 0 1
pintype=pas
}
P 3800 75700 3800 75500 1 0 0
{
T 3750 75500 5 8 0 1 90 0 1
pinnumber=2
T 3750 75500 5 8 0 0 90 0 1
pinseq=2
T 3800 75700 5 10 0 0 90 0 1
pintype=pas
T 3800 75700 5 10 0 0 90 0 1
pinlabel=pin2
}
L 3629 75200 3970 75200 3 0 0 0 -1 -1
L 3628 75300 3968 75300 3 0 0 0 -1 -1
L 3800 75500 3800 75300 3 0 0 0 -1 -1
L 3800 75200 3800 75000 3 0 0 0 -1 -1
T 3400 75100 5 10 0 0 90 0 1
device=CAPACITOR
T 3500 75000 8 10 0 1 90 0 1
refdes=C64
T 3200 75000 8 10 0 0 90 0 1
class=DISCRETE
T 3000 75300 8 10 0 0 90 0 1
numslots=0
T 2800 75100 8 10 0 0 90 0 1
footprint=d0603
]
{
T 3777 74818 5 10 1 1 90 0 1
refdes=C71
T 3779 75312 5 10 1 1 90 0 1
value=1uF bulk
T 3956 75309 5 10 1 1 90 0 1
footprint=d1206
}
C 4500 74800 1 90 0 EMBEDDEDcapacitor-d1.sym
[
P 4300 74800 4300 75000 1 0 0
{
T 4250 74900 5 8 0 1 90 0 1
pinnumber=1
T 4250 74900 5 8 0 0 90 0 1
pinseq=1
T 4300 74800 5 10 0 0 90 0 1
pinlabel=pin1
T 4300 74800 5 10 0 0 90 0 1
pintype=pas
}
P 4300 75700 4300 75500 1 0 0
{
T 4250 75500 5 8 0 1 90 0 1
pinnumber=2
T 4250 75500 5 8 0 0 90 0 1
pinseq=2
T 4300 75700 5 10 0 0 90 0 1
pintype=pas
T 4300 75700 5 10 0 0 90 0 1
pinlabel=pin2
}
L 4129 75200 4470 75200 3 0 0 0 -1 -1
L 4128 75300 4468 75300 3 0 0 0 -1 -1
L 4300 75500 4300 75300 3 0 0 0 -1 -1
L 4300 75200 4300 75000 3 0 0 0 -1 -1
T 3900 75100 5 10 0 0 90 0 1
device=CAPACITOR
T 4000 75000 8 10 0 1 90 0 1
refdes=C65
T 3700 75000 8 10 0 0 90 0 1
class=DISCRETE
T 3500 75300 8 10 0 0 90 0 1
numslots=0
T 3300 75100 8 10 0 0 90 0 1
footprint=d0603
]
{
T 4277 74818 5 10 1 1 90 0 1
refdes=C72
T 4279 75312 5 10 1 1 90 0 1
value=1uF bulk
T 4456 75309 5 10 1 1 90 0 1
footprint=d1206
}
N 3800 74800 3800 74700 4
C 3400 74300 1 0 0 EMBEDDEDgnd-1.sym
[
P 3500 74400 3500 74600 1 0 1
{
T 3558 74461 5 4 0 1 0 0 1
pinnumber=1
T 3558 74461 5 4 0 0 0 0 1
pinseq=1
}
L 3400 74400 3600 74400 3 0 0 0 -1 -1
L 3455 74350 3545 74350 3 0 0 0 -1 -1
L 3480 74310 3520 74310 3 0 0 0 -1 -1
T 3700 74350 8 10 0 0 0 0 1
net=GND:1
]
N 3500 74600 3500 74700 4
N 2800 74800 2800 74700 4
N 2800 74700 4300 74700 4
N 4300 74700 4300 74800 4
N 3300 74800 3300 74700 4
N 3800 75700 3800 76000 4
N 3800 76000 4300 76000 4
N 4300 75700 4300 76000 4
N 2800 75700 2800 76000 4
N 2800 76000 3300 76000 4
N 3300 76000 3300 75700 4
C 3100 76000 1 0 0 EMBEDDED3.3V.sym
[
P 3300 76000 3300 76200 1 0 0
{
T 3350 76050 5 6 0 1 0 0 1
pinnumber=1
T 3350 76050 5 6 0 0 0 0 1
pinseq=1
}
L 3150 76200 3450 76200 3 0 0 0 -1 -1
T 3175 76250 9 8 1 0 0 0 1
+3.3V
T 3400 76000 8 8 0 0 0 0 1
net=+3.3V:1
]
C 4100 76000 1 0 0 EMBEDDED1.2V.sym
[
P 4300 76000 4300 76200 1 0 0
{
T 4350 76050 5 6 0 1 0 0 1
pinnumber=1
T 4350 76050 5 6 0 0 0 0 1
pinseq=1
}
L 4150 76200 4450 76200 3 0 0 0 -1 -1
T 4175 76250 9 8 1 0 0 0 1
+1.2V
T 4400 76000 8 8 0 0 0 0 1
net=+1.2V:1
]
C 2200 88200 1 90 0 EMBEDDEDresistor-d.sym
[
P 2100 89100 2100 88950 1 0 0
{
T 2050 89000 5 8 0 1 90 0 1
pinnumber=2
T 2050 89000 5 8 0 0 90 0 1
pinseq=2
T 2050 89000 5 8 0 1 90 0 1
pintype=pas
T 2050 89000 5 8 0 0 90 0 1
pinlabel=2
}
P 2100 88200 2100 88352 1 0 0
{
T 2050 88300 5 8 0 1 90 0 1
pinnumber=1
T 2050 88300 5 8 0 0 90 0 1
pinseq=1
T 2050 88300 5 8 0 1 90 0 1
pintype=pas
T 2050 88300 5 8 0 0 90 0 1
pinlabel=1
}
B 2000 88350 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 1850 88600 5 10 0 0 90 0 1
device=RESISTOR
T 1900 88400 8 10 0 1 90 0 1
refdes=R48
T 1850 88600 5 10 0 0 90 0 1
footprint=d0603
T 1850 88600 5 10 0 0 90 0 1
numslots=0
]
{
T 2010 88890 5 10 1 1 180 0 1
refdes=R57
T 2168 88432 5 10 1 1 90 0 1
value=10k
T 1980 88187 5 10 0 1 90 0 1
footprint=d0603
}
N 2100 89100 2100 89300 4
C 1900 89300 1 0 0 EMBEDDED3.3V.sym
[
P 2100 89300 2100 89500 1 0 0
{
T 2150 89350 5 6 0 1 0 0 1
pinnumber=1
T 2150 89350 5 6 0 0 0 0 1
pinseq=1
}
L 1950 89500 2250 89500 3 0 0 0 -1 -1
T 1975 89550 9 8 1 0 0 0 1
+3.3V
T 2200 89300 8 8 0 0 0 0 1
net=+3.3V:1
]
N 2100 88200 2100 86000 4
N 4300 79500 4000 79500 4
N 4000 79500 4000 79700 4
C 3800 84300 1 0 0 nc-left-1.sym
{
T 4085 84550 5 10 0 0 0 0 1
value=NoConnection
T 5800 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 3800 83500 1 0 0 nc-left-1.sym
{
T 4085 83750 5 10 0 0 0 0 1
value=NoConnection
T 5800 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 3800 82600 1 0 0 nc-left-1.sym
{
T 4085 82850 5 10 0 0 0 0 1
value=NoConnection
T 5800 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 3800 81800 1 0 0 nc-left-1.sym
{
T 4085 82050 5 10 0 0 0 0 1
value=NoConnection
T 5800 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 21600 82000 1 0 0 nc-left-1.sym
{
T 21885 82250 5 10 0 0 0 0 1
value=NoConnection
T 5800 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 12800 76300 1 270 0 EMBEDDEDcapacitor-d1.sym
[
P 13000 76300 13000 76500 1 0 0
{
T 13050 76400 5 8 0 1 270 6 1
pinnumber=1
T 13050 76400 5 8 0 0 270 6 1
pinseq=1
T 13000 76300 5 10 0 0 270 6 1
pinlabel=pin1
T 13000 76300 5 10 0 0 270 6 1
pintype=pas
}
P 13000 77200 13000 77000 1 0 0
{
T 13050 77000 5 8 0 1 270 6 1
pinnumber=2
T 13050 77000 5 8 0 0 270 6 1
pinseq=2
T 13000 77200 5 10 0 0 270 6 1
pintype=pas
T 13000 77200 5 10 0 0 270 6 1
pinlabel=pin2
}
L 13171 76700 12830 76700 3 0 0 0 -1 -1
L 13172 76800 12832 76800 3 0 0 0 -1 -1
L 13000 77000 13000 76800 3 0 0 0 -1 -1
L 13000 76700 13000 76500 3 0 0 0 -1 -1
T 13400 76600 5 10 0 0 270 6 1
device=CAPACITOR
T 13300 76500 8 10 0 1 270 6 1
refdes=C76
T 13600 76500 8 10 0 0 270 6 1
class=DISCRETE
T 13800 76800 8 10 0 0 270 6 1
numslots=0
T 14000 76600 8 10 0 0 270 6 1
footprint=d0603
]
{
T 12300 76600 5 10 1 1 0 0 1
refdes=C47
T 12200 76400 5 10 1 1 0 0 1
value=10nF cer
}
C 14000 77200 1 90 0 EMBEDDEDcapacitor-d2.sym
[
P 13800 77200 13800 77000 1 0 0
{
T 13750 77100 5 8 0 1 90 6 1
pinnumber=1
T 13750 77100 5 8 0 0 90 6 1
pinseq=1
T 13800 77200 5 10 0 0 90 6 1
pinlabel=+
T 13800 77200 5 10 0 0 90 6 1
pintype=pas
}
P 13800 76300 13800 76500 1 0 0
{
T 13750 76500 5 8 0 1 90 6 1
pinnumber=2
T 13750 76500 5 8 0 0 90 6 1
pinseq=2
T 13800 76300 5 10 0 0 90 6 1
pinlabel=-
T 13800 76300 5 10 0 0 90 6 1
pintype=pas
}
L 13600 76800 14000 76800 3 0 0 0 -1 -1
L 13800 76500 13800 76700 3 0 0 0 -1 -1
L 13800 76800 13800 77000 3 0 0 0 -1 -1
A 13800 76000 700 75 30 3 0 0 0 -1 -1
L 13600 76911 13700 76911 3 0 0 0 -1 -1
L 13651 76860 13651 76960 3 0 0 0 -1 -1
T 12900 77000 5 10 0 0 90 6 1
device=POLARIZED_CAPACITOR
T 13500 77000 8 10 0 1 90 6 1
refdes=C77
T 13100 76900 8 10 0 0 90 6 1
class=DISCRETE
T 13100 76900 8 10 0 0 90 6 1
footprint=d0603
T 13100 76900 8 10 0 0 90 6 1
numslots=0
]
{
T 14100 76900 5 10 1 1 0 0 1
refdes=C48
T 14100 76700 5 10 1 1 0 0 1
value=100uF tantal
T 14100 76500 5 10 0 1 0 0 1
footprint=dcap-elec-D8.00-P3.50-mm
}
C 12900 75700 1 0 0 EMBEDDEDinductor-d.sym
[
P 12000 75700 12150 75700 1 0 0
{
T 11900 75650 5 8 0 0 0 6 1
pinnumber=2
T 11800 75750 5 8 0 0 0 6 1
pinseq=2
T 12000 76000 5 10 0 0 0 6 1
pinlabel=2
T 12000 75900 5 10 0 0 0 6 1
pintype=pas
}
P 12900 75700 12750 75700 1 0 0
{
T 12900 76050 5 8 0 0 0 6 1
pinnumber=1
T 12800 75950 5 8 0 0 0 6 1
pinseq=1
T 12900 75800 5 10 0 0 0 6 1
pinlabel=1
T 13000 75600 5 10 0 0 0 6 1
pintype=pas
}
A 12663 75700 75 0 180 3 0 0 0 -1 -1
A 12521 75700 75 0 180 3 0 0 0 -1 -1
A 12379 75700 75 0 180 3 0 0 0 -1 -1
A 12237 75700 75 0 180 3 0 0 0 -1 -1
L 12162 75700 12150 75700 3 0 0 0 -1 -1
L 12750 75700 12738 75700 3 0 0 0 -1 -1
A 12592 75700 4 180 180 3 0 0 0 -1 -1
A 12450 75700 4 180 180 3 0 0 0 -1 -1
A 12308 75700 4 180 180 3 0 0 0 -1 -1
T 12700 76200 5 10 0 0 0 6 1
device=INDUCTOR
T 12700 75900 8 10 0 1 0 6 1
refdes=L2
T 12700 76400 8 10 0 0 0 6 1
class=DISCRETE
T 12600 76600 8 10 0 0 0 6 1
pins=2
T 12600 76750 8 10 0 0 0 6 1
numslots=0
]
{
T 12500 76000 5 10 1 1 0 6 1
refdes=L1
T 12000 75800 5 10 1 1 0 0 1
value=CL10uH SW68
T 12900 75700 5 10 0 1 0 0 1
footprint=dinductor_0.8mm_9mm
}
C 11700 74700 1 270 0 EMBEDDEDdiode-d.sym
[
L 12100 75000 11700 75000 3 0 0 0 -1 -1
L 12100 75000 11900 75300 3 0 0 0 -1 -1
L 11900 75300 11700 75000 3 0 0 0 -1 -1
L 12100 75300 11700 75300 3 0 0 0 -1 -1
P 11900 74700 11900 74900 1 0 0
{
T 11950 74800 5 8 0 1 270 6 1
pinnumber=2
T 11950 74800 5 8 0 0 270 6 1
pinseq=2
T 11950 74800 5 8 0 1 270 6 1
pintype=pas
T 11950 74800 5 8 0 0 270 6 1
pinlabel=2
}
P 11900 75600 11900 75400 1 0 0
{
T 11950 75400 5 8 0 1 270 6 1
pinnumber=1
T 11950 75400 5 8 0 0 270 6 1
pinseq=1
T 11950 75400 5 8 0 1 270 6 1
pintype=pas
T 11950 75400 5 8 0 0 270 6 1
pinlabel=1
}
L 11900 75400 11900 75300 3 0 0 0 -1 -1
L 11900 75000 11900 74900 3 0 0 0 -1 -1
T 12300 75100 5 10 0 0 270 6 1
device=DIODE
T 12300 75100 5 10 0 0 270 6 1
footprint=SMA
T 12300 75100 5 10 0 0 270 6 1
numslots=0
T 12200 75000 8 10 0 1 270 6 1
refdes=D2
]
{
T 11500 75300 5 10 1 1 180 2 1
refdes=D1
T 10400 74900 5 10 1 1 0 0 1
footprint=DIODE_SMA
T 10900 75100 5 10 1 1 0 0 1
value=1N5819
}
C 14000 75600 1 90 0 EMBEDDEDcapacitor-d2.sym
[
P 13800 75600 13800 75400 1 0 0
{
T 13750 75500 5 8 0 1 90 6 1
pinnumber=1
T 13750 75500 5 8 0 0 90 6 1
pinseq=1
T 13800 75600 5 10 0 0 90 6 1
pinlabel=+
T 13800 75600 5 10 0 0 90 6 1
pintype=pas
}
P 13800 74700 13800 74900 1 0 0
{
T 13750 74900 5 8 0 1 90 6 1
pinnumber=2
T 13750 74900 5 8 0 0 90 6 1
pinseq=2
T 13800 74700 5 10 0 0 90 6 1
pinlabel=-
T 13800 74700 5 10 0 0 90 6 1
pintype=pas
}
L 13600 75200 14000 75200 3 0 0 0 -1 -1
L 13800 74900 13800 75100 3 0 0 0 -1 -1
L 13800 75200 13800 75400 3 0 0 0 -1 -1
A 13800 74400 700 75 30 3 0 0 0 -1 -1
L 13600 75311 13700 75311 3 0 0 0 -1 -1
L 13651 75260 13651 75360 3 0 0 0 -1 -1
T 12900 75400 5 10 0 0 90 6 1
device=POLARIZED_CAPACITOR
T 13500 75400 8 10 0 1 90 6 1
refdes=C78
T 13100 75300 8 10 0 0 90 6 1
class=DISCRETE
T 13100 75300 8 10 0 0 90 6 1
footprint=d0603
T 13100 75300 8 10 0 0 90 6 1
numslots=0
]
{
T 14100 75300 5 10 1 1 0 0 1
refdes=C50
T 14100 75100 5 10 1 1 0 0 1
value=100uF tantal
T 14100 74900 5 10 0 1 0 0 1
footprint=dcap-elec-D8.00-P3.50-mm
}
C 12800 74700 1 270 0 EMBEDDEDcapacitor-d1.sym
[
P 13000 74700 13000 74900 1 0 0
{
T 13050 74800 5 8 0 1 270 6 1
pinnumber=1
T 13050 74800 5 8 0 0 270 6 1
pinseq=1
T 13000 74700 5 10 0 0 270 6 1
pinlabel=pin1
T 13000 74700 5 10 0 0 270 6 1
pintype=pas
}
P 13000 75600 13000 75400 1 0 0
{
T 13050 75400 5 8 0 1 270 6 1
pinnumber=2
T 13050 75400 5 8 0 0 270 6 1
pinseq=2
T 13000 75600 5 10 0 0 270 6 1
pintype=pas
T 13000 75600 5 10 0 0 270 6 1
pinlabel=pin2
}
L 13171 75100 12830 75100 3 0 0 0 -1 -1
L 13172 75200 12832 75200 3 0 0 0 -1 -1
L 13000 75400 13000 75200 3 0 0 0 -1 -1
L 13000 75100 13000 74900 3 0 0 0 -1 -1
T 13400 75000 5 10 0 0 270 6 1
device=CAPACITOR
T 13300 74900 8 10 0 1 270 6 1
refdes=C79
T 13600 74900 8 10 0 0 270 6 1
class=DISCRETE
T 13800 75200 8 10 0 0 270 6 1
numslots=0
T 14000 75000 8 10 0 0 270 6 1
footprint=d0603
]
{
T 12200 75100 5 10 1 1 0 0 1
refdes=C49
T 12200 74900 5 10 1 1 0 0 1
value=10nF cer
}
N 13800 77200 13800 77300 4
N 13000 77300 13000 77200 4
C 14300 77100 1 270 0 EMBEDDED3.3V.sym
[
P 14300 77300 14500 77300 1 0 0
{
T 14350 77350 5 6 0 1 270 6 1
pinnumber=1
T 14350 77350 5 6 0 0 270 6 1
pinseq=1
}
L 14500 77150 14500 77450 3 0 0 0 -1 -1
T 14550 77175 9 8 1 0 270 6 1
+3.3V
T 14300 77400 8 8 0 0 270 6 1
net=+3.3V:1
]
C 14300 75500 1 270 0 EMBEDDED1.2V.sym
[
P 14300 75700 14500 75700 1 0 0
{
T 14350 75750 5 6 0 1 270 6 1
pinnumber=1
T 14350 75750 5 6 0 0 270 6 1
pinseq=1
}
L 14500 75550 14500 75850 3 0 0 0 -1 -1
T 14550 75575 9 8 1 0 270 6 1
+1.2V
T 14300 75800 8 8 0 0 270 6 1
net=+1.2V:1
]
N 13000 75700 13000 75600 4
N 13800 75700 13800 75600 4
C 14200 74300 1 0 0 EMBEDDEDgnd-1.sym
[
P 14100 74400 14100 74600 1 0 1
{
T 14042 74461 5 4 0 1 0 6 1
pinnumber=1
T 14042 74461 5 4 0 0 0 6 1
pinseq=1
}
L 14200 74400 14000 74400 3 0 0 0 -1 -1
L 14145 74350 14055 74350 3 0 0 0 -1 -1
L 14120 74310 14080 74310 3 0 0 0 -1 -1
T 13900 74350 8 10 0 0 0 6 1
net=GND:1
]
C 13900 75800 1 0 0 EMBEDDEDgnd-1.sym
[
P 13800 75900 13800 76100 1 0 1
{
T 13742 75961 5 4 0 1 0 6 1
pinnumber=1
T 13742 75961 5 4 0 0 0 6 1
pinseq=1
}
L 13900 75900 13700 75900 3 0 0 0 -1 -1
L 13845 75850 13755 75850 3 0 0 0 -1 -1
L 13820 75810 13780 75810 3 0 0 0 -1 -1
T 13600 75850 8 10 0 0 0 6 1
net=GND:1
]
N 13800 76300 13800 76100 4
N 13800 76200 13000 76200 4
N 13000 76200 13000 76300 4
N 13000 74600 13000 74700 4
N 12900 75700 14300 75700 4
N 10500 75700 12000 75700 4
N 11900 75700 11900 75600 4
N 11900 74700 11900 74600 4
C 11900 75800 1 0 1 zxm64p02x.sym
{
T 10294 77334 5 10 1 1 0 0 1
refdes=T1
T 10661 77340 5 10 1 1 0 0 1
value=ZXM64P02X
T 11600 75800 5 10 1 1 0 6 1
footprint=DMSOP8
}
N 10500 75700 10500 76800 4
N 12100 76600 12100 77300 4
N 12100 77300 14300 77300 4
N 11900 76800 11900 77800 4
N 11900 77800 10000 77800 4
{
T 10000 77833 5 10 1 1 0 0 1
netname=VROUT0
}
C 8000 77600 1 90 0 EMBEDDEDbusripper-1.sym
[
P 8000 77600 7900 77700 1 0 0
{
T 7500 77600 5 8 0 0 90 0 1
pinseq=1
T 7400 77600 5 8 0 0 90 0 1
pinnumber=1
T 7300 77600 5 8 0 0 90 0 1
pintype=pas
T 7200 77600 5 8 0 0 90 0 1
pinlabel=netside
}
L 7800 77800 7900 77700 10 30 0 0 -1 -1
T 7600 77600 5 8 0 0 90 0 1
device=none
T 7700 77600 5 8 0 0 90 0 1
graphical=1
]
N 11900 76200 11900 76600 4
N 11900 76600 12100 76600 4
T 14100 76100 9 10 1 0 0 0 2
Keep C49,C50 as close as
posible to the MOS transistor
T 12000 77400 9 10 1 0 0 0 2
Keep C47,C48 as close as
posible to the MOS transistor
T 10066 77635 9 10 1 0 0 0 1
Keep trace short
N 13800 74700 13800 74600 4
N 11900 74600 14100 74600 4
C 21700 87900 1 270 0 EMBEDDED3.3V.sym
[
P 21700 87700 21900 87700 1 0 0
{
T 21750 87650 5 6 0 1 270 0 1
pinnumber=1
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pinseq=1
}
L 21900 87850 21900 87550 3 0 0 0 -1 -1
T 21950 87825 9 8 1 0 270 0 1
+3.3V
T 21700 87600 8 8 0 0 270 0 1
net=+3.3V:1
]
C 21000 85500 1 0 0 EMBEDDEDgnd-1.sym
[
P 21100 85600 21100 85800 1 0 1
{
T 21158 85661 5 4 0 1 0 0 1
pinnumber=1
T 21158 85661 5 4 0 0 0 0 1
pinseq=1
}
L 21000 85600 21200 85600 3 0 0 0 -1 -1
L 21055 85550 21145 85550 3 0 0 0 -1 -1
L 21080 85510 21120 85510 3 0 0 0 -1 -1
T 21300 85550 8 10 0 0 0 0 1
net=GND:1
]
N 20300 86600 19000 86600 4
{
T 19308 86620 5 10 1 1 0 0 1
netname=RESET
}
N 21100 85900 21100 85800 4
C 21800 85900 1 0 0 EMBEDDEDTPS3808.sym
[
P 20800 87300 20800 87100 1 0 0
{
T 20741 87126 5 10 1 1 0 6 1
pinnumber=6
T 20800 87300 5 10 0 1 270 2 1
pinseq=6
T 20800 87300 5 10 0 0 270 2 1
pintype=pwr
T 20976 86946 5 10 1 1 0 6 1
pinlabel=Vcc
}
P 20300 86600 20500 86600 1 0 0
{
T 20461 86623 5 10 1 1 0 6 1
pinnumber=1
T 20300 86600 5 10 0 1 0 6 1
pinseq=1
T 20300 86600 5 10 0 1 0 6 1
pintype=out
T 20534 86543 5 10 1 1 0 0 1
pinlabel=RESET
}
P 21100 85900 21100 86100 1 0 0
{
T 21063 85947 5 10 1 1 0 6 1
pinnumber=2
T 21100 85900 5 10 0 1 0 6 1
pinseq=2
T 21100 85900 5 10 0 1 0 6 1
pintype=pwr
T 21255 86119 5 10 1 1 0 6 1
pinlabel=GND
}
B 20500 86100 1100 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
{
T 21402 87213 5 10 0 0 0 6 1
device=TPS3808
T 20358 87050 5 10 0 1 0 6 1
footprint=DSOT23-6
}
P 21800 86600 21600 86600 1 0 0
{
T 21722 86627 5 10 1 1 0 6 1
pinnumber=3
T 21800 86600 5 10 0 1 0 6 1
pinseq=3
T 21544 86543 5 10 1 1 0 6 1
pinlabel=MR
T 21800 86600 5 10 0 0 0 6 1
pintype=in
}
P 21800 86300 21600 86300 1 0 0
{
T 21537 86307 5 10 1 1 0 6 1
pinlabel=Ct
T 21742 86334 5 10 1 1 0 6 1
pinnumber=4
T 21800 86300 5 10 0 0 0 6 1
pinseq=4
T 21800 86300 5 10 0 0 0 6 1
pintype=in
}
P 21400 87300 21400 87100 1 0 0
{
T 21341 87126 5 10 1 1 0 6 1
pinnumber=5
T 21400 87300 5 10 0 1 270 2 1
pinseq=5
T 21400 87300 5 10 0 0 270 2 1
pintype=pwr
T 21528 86949 5 10 1 1 0 6 1
pinlabel=Sense
}
T 20602 87216 8 10 0 1 0 6 1
refdes=U4
T 20337 87218 8 10 0 1 0 6 1
value=TPS3808
T 21402 87413 8 10 0 0 0 6 1
numslots=0
]
{
T 21444 87424 5 10 1 1 0 0 1
refdes=U10
T 21447 87182 5 10 1 1 0 0 1
value=TPS3808G33DBVR
T 21800 85900 5 10 0 0 0 0 1
footprint=DDBV
}
N 20200 87700 21700 87700 4
N 20800 87700 20800 87300 4
N 21400 87300 21400 87700 4
C 21300 88300 1 0 0 EMBEDDEDTPS3808.sym
[
P 22300 89700 22300 89500 1 0 0
{
T 22359 89526 5 10 1 1 0 0 1
pinnumber=6
T 22300 89700 5 10 0 1 270 0 1
pinseq=6
T 22300 89700 5 10 0 0 270 0 1
pintype=pwr
T 22124 89346 5 10 1 1 0 0 1
pinlabel=Vcc
}
P 22800 89000 22600 89000 1 0 0
{
T 22639 89023 5 10 1 1 0 0 1
pinnumber=1
T 22800 89000 5 10 0 1 0 0 1
pinseq=1
T 22800 89000 5 10 0 1 0 0 1
pintype=out
T 22566 88943 5 10 1 1 0 6 1
pinlabel=RESET
}
P 22000 88300 22000 88500 1 0 0
{
T 22037 88347 5 10 1 1 0 0 1
pinnumber=2
T 22000 88300 5 10 0 1 0 0 1
pinseq=2
T 22000 88300 5 10 0 1 0 0 1
pintype=pwr
T 21845 88519 5 10 1 1 0 0 1
pinlabel=GND
}
B 21500 88500 1100 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
{
T 21698 89613 5 10 0 0 0 0 1
device=TPS3808
T 22742 89450 5 10 0 1 0 0 1
footprint=DSOT23-6
}
P 21300 89000 21500 89000 1 0 0
{
T 21378 89027 5 10 1 1 0 0 1
pinnumber=3
T 21300 89000 5 10 0 1 0 0 1
pinseq=3
T 21556 88943 5 10 1 1 0 0 1
pinlabel=MR
T 21300 89000 5 10 0 0 0 0 1
pintype=in
}
P 21300 88700 21500 88700 1 0 0
{
T 21563 88707 5 10 1 1 0 0 1
pinlabel=Ct
T 21358 88734 5 10 1 1 0 0 1
pinnumber=4
T 21300 88700 5 10 0 0 0 0 1
pinseq=4
T 21300 88700 5 10 0 0 0 0 1
pintype=in
}
P 21700 89700 21700 89500 1 0 0
{
T 21759 89526 5 10 1 1 0 0 1
pinnumber=5
T 21700 89700 5 10 0 1 270 0 1
pinseq=5
T 21700 89700 5 10 0 0 270 0 1
pintype=pwr
T 21572 89349 5 10 1 1 0 0 1
pinlabel=Sense
}
T 22498 89616 8 10 0 1 0 0 1
refdes=U5
T 22763 89618 8 10 0 1 0 0 1
value=TPS3808
T 21698 89813 8 10 0 0 0 0 1
numslots=0
]
{
T 22156 90124 5 10 1 1 0 6 1
refdes=U9
T 22953 89882 5 10 1 1 0 6 1
value=TPS3808G12DBVR
T 21300 88300 5 10 0 0 0 0 1
footprint=DDBV
}
C 22900 90000 1 270 0 EMBEDDED3.3V.sym
[
P 22900 89800 23100 89800 1 0 0
{
T 22950 89750 5 6 0 1 270 0 1
pinnumber=1
T 22950 89750 5 6 0 0 270 0 1
pinseq=1
}
L 23100 89950 23100 89650 3 0 0 0 -1 -1
T 23150 89925 9 8 1 0 270 0 1
+3.3V
T 22900 89700 8 8 0 0 270 0 1
net=+3.3V:1
]
N 22900 89800 22300 89800 4
N 22300 89800 22300 89700 4
N 21700 89700 21700 89800 4
C 22100 87900 1 0 0 EMBEDDEDgnd-1.sym
[
P 22000 88000 22000 88200 1 0 1
{
T 21942 88061 5 4 0 1 0 6 1
pinnumber=1
T 21942 88061 5 4 0 0 0 6 1
pinseq=1
}
L 22100 88000 21900 88000 3 0 0 0 -1 -1
L 22045 87950 21955 87950 3 0 0 0 -1 -1
L 22020 87910 21980 87910 3 0 0 0 -1 -1
T 21800 87950 8 10 0 0 0 6 1
net=GND:1
]
N 22000 88300 22000 88200 4
N 21800 86600 22900 86600 4
N 22900 86600 22900 89000 4
N 22900 89000 22800 89000 4
C 21900 86100 1 0 0 EMBEDDEDcapacitor-d1.sym
[
P 21900 86300 22100 86300 1 0 0
{
T 22000 86350 5 8 0 1 0 0 1
pinnumber=1
T 22000 86350 5 8 0 0 0 0 1
pinseq=1
T 21900 86300 5 10 0 0 0 0 1
pinlabel=pin1
T 21900 86300 5 10 0 0 0 0 1
pintype=pas
}
P 22800 86300 22600 86300 1 0 0
{
T 22600 86350 5 8 0 1 0 0 1
pinnumber=2
T 22600 86350 5 8 0 0 0 0 1
pinseq=2
T 22800 86300 5 10 0 0 0 0 1
pintype=pas
T 22800 86300 5 10 0 0 0 0 1
pinlabel=pin2
}
L 22300 86471 22300 86130 3 0 0 0 -1 -1
L 22400 86472 22400 86132 3 0 0 0 -1 -1
L 22600 86300 22400 86300 3 0 0 0 -1 -1
L 22300 86300 22100 86300 3 0 0 0 -1 -1
T 22200 86700 5 10 0 0 0 0 1
device=CAPACITOR
T 22100 86600 8 10 0 1 0 0 1
refdes=C61
T 22100 86900 8 10 0 0 0 0 1
class=DISCRETE
T 22400 87100 8 10 0 0 0 0 1
numslots=0
T 22200 87300 8 10 0 0 0 0 1
footprint=d0603
]
{
T 21900 86400 5 10 1 1 0 0 1
refdes=C53
T 22500 86400 5 10 1 1 0 0 1
footprint=d0603
T 22500 86100 5 10 1 1 0 0 1
value=1nF
}
C 22900 85800 1 0 0 EMBEDDEDgnd-1.sym
[
P 23000 85900 23000 86100 1 0 1
{
T 23058 85961 5 4 0 1 0 0 1
pinnumber=1
T 23058 85961 5 4 0 0 0 0 1
pinseq=1
}
L 22900 85900 23100 85900 3 0 0 0 -1 -1
L 22955 85850 23045 85850 3 0 0 0 -1 -1
L 22980 85810 23020 85810 3 0 0 0 -1 -1
T 23200 85850 8 10 0 0 0 0 1
net=GND:1
]
N 21800 86300 21900 86300 4
N 22800 86300 23000 86300 4
N 23000 86100 23000 86300 4
C 20300 86700 1 90 0 EMBEDDEDresistor-d.sym
[
P 20200 87600 20200 87450 1 0 0
{
T 20150 87500 5 8 0 1 90 0 1
pinnumber=2
T 20150 87500 5 8 0 0 90 0 1
pinseq=2
T 20150 87500 5 8 0 1 90 0 1
pintype=pas
T 20150 87500 5 8 0 0 90 0 1
pinlabel=2
}
P 20200 86700 20200 86852 1 0 0
{
T 20150 86800 5 8 0 1 90 0 1
pinnumber=1
T 20150 86800 5 8 0 0 90 0 1
pinseq=1
T 20150 86800 5 8 0 1 90 0 1
pintype=pas
T 20150 86800 5 8 0 0 90 0 1
pinlabel=1
}
B 20100 86850 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 19950 87100 5 10 0 0 90 0 1
device=RESISTOR
T 20000 86900 8 10 0 1 90 0 1
refdes=R47
T 19950 87100 5 10 0 0 90 0 1
footprint=d0603
T 19950 87100 5 10 0 0 90 0 1
numslots=0
]
{
T 20081 86854 5 10 1 1 90 0 1
refdes=R37
T 20268 86932 5 10 1 1 90 0 1
value=10k
T 20080 87287 5 10 1 1 90 0 1
footprint=d0603
}
N 20200 86700 20200 86600 4
N 20200 87600 20200 87700 4
C 21200 90000 1 90 0 EMBEDDED1.2V.sym
[
P 21200 89800 21000 89800 1 0 0
{
T 21150 89750 5 6 0 1 90 6 1
pinnumber=1
T 21150 89750 5 6 0 0 90 6 1
pinseq=1
}
L 21000 89950 21000 89650 3 0 0 0 -1 -1
T 20950 89925 9 8 1 0 90 6 1
+1.2V
T 21200 89700 8 8 0 0 90 6 1
net=+1.2V:1
]
N 21200 89800 21700 89800 4
C 20800 88600 1 0 0 nc-left-1.sym
{
T 21085 88850 5 10 0 0 0 0 1
value=NoConnection
T 5800 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 20400 88700 1 0 0 EMBEDDEDdbutton-2.sym
[
P 20400 89000 20200 89000 1 0 0
{
T 20348 89023 5 8 1 1 0 6 1
pinnumber=1
T 20350 89050 5 8 0 0 0 6 1
pinseq=1
T 20400 89000 5 10 0 0 0 6 1
pintype=pas
T 20400 89000 5 10 0 0 0 6 1
pinlabel=1
}
P 19600 89000 19400 89000 1 0 1
{
T 19502 89020 5 8 1 1 0 6 1
pinnumber=2
T 19500 89050 5 8 0 0 0 6 1
pinseq=2
T 19600 89000 5 10 0 0 0 6 1
pinlabel=1
T 19600 89000 5 10 0 0 0 6 1
pintype=pas
}
L 20250 89000 20075 89000 3 0 0 0 -1 -1
L 19550 89000 19725 89000 3 0 0 0 -1 -1
L 20100 89085 19700 89085 3 0 0 0 -1 -1
V 20061 89000 14 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 19738 89000 14 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 19930 89255 19880 89255 3 0 0 0 -1 -1
L 19930 89205 19880 89205 3 0 0 0 -1 -1
L 19930 89205 19905 89155 3 0 0 0 -1 -1
L 19880 89205 19905 89155 3 0 0 0 -1 -1
L 19905 89205 19905 89255 3 0 0 0 -1 -1
L 19905 89155 19905 89086 3 0 0 0 -1 -1
L 20200 89300 19600 89300 3 0 0 0 -1 -1
L 19600 89300 19600 88700 3 0 0 0 -1 -1
L 19600 88800 20200 88800 3 0 0 0 -1 -1
L 20200 88700 20200 89300 3 0 0 0 -1 -1
P 20400 88800 20200 88800 1 0 0
{
T 20400 88800 5 10 0 0 0 6 1
pinseq=3
T 20400 88800 5 10 0 0 0 6 1
pintype=pas
T 20400 88800 5 10 0 0 0 6 1
pinlabel=3
T 20355 88823 5 8 1 1 0 6 1
pinnumber=3
}
P 19400 88800 19600 88800 1 0 0
{
T 19400 88800 5 10 0 0 0 6 1
pinseq=4
T 19400 88800 5 10 0 0 0 6 1
pintype=pas
T 19400 88800 5 10 0 0 0 6 1
pinlabel=4
T 19493 88832 5 8 1 1 0 6 1
pinnumber=4
}
L 19600 88700 20200 88700 3 0 0 0 -1 -1
T 20182 89318 8 10 0 1 0 6 1
refdes=S1
T 20000 89600 8 10 0 0 0 6 1
device=SWITCH_PUSHBUTTON_NO
T 20282 89518 8 8 0 1 0 6 1
footprint=button_edge
T 19800 90000 8 10 0 0 0 6 1
footprint=button_edge
]
{
T 19932 88318 5 10 1 1 0 6 1
refdes=SW1
T 20100 88325 5 10 1 1 0 0 1
comment=DNL
}
N 19300 89000 19400 89000 4
N 19300 89000 19300 88500 4
N 19400 88800 19300 88800 4
N 20400 88800 20500 88800 4
N 20500 88800 20500 88600 4
N 20500 88600 19300 88600 4
N 20400 89000 21300 89000 4
T 19300 89600 1 20 1 0 0 0 1
RESET
T 9700 89500 1 20 1 0 0 0 1
BLACKFIN CPU
C 19200 88200 1 0 0 EMBEDDEDgnd-1.sym
[
P 19300 88300 19300 88500 1 0 1
{
T 19358 88361 5 4 0 1 0 0 1
pinnumber=1
T 19358 88361 5 4 0 0 0 0 1
pinseq=1
}
L 19200 88300 19400 88300 3 0 0 0 -1 -1
L 19255 88250 19345 88250 3 0 0 0 -1 -1
L 19280 88210 19320 88210 3 0 0 0 -1 -1
T 19500 88250 8 10 0 0 0 0 1
net=GND:1
]
N 4300 83800 900 83800 4
{
T 1005 83842 5 10 1 1 180 8 1
netname=DT1
}
C 900 83800 1 90 0 EMBEDDEDbusripper-1.sym
[
P 900 83800 800 83900 1 0 0
{
T 400 83800 5 8 0 0 90 0 1
pinseq=1
T 300 83800 5 8 0 0 90 0 1
pinnumber=1
T 200 83800 5 8 0 0 90 0 1
pintype=pas
T 100 83800 5 8 0 0 90 0 1
pinlabel=netside
}
L 700 84000 800 83900 10 30 0 0 -1 -1
T 500 83800 5 8 0 0 90 0 1
device=none
T 600 83800 5 8 0 0 90 0 1
graphical=1
]
N 4300 84800 900 84800 4
{
T 1005 84842 5 10 1 1 180 8 1
netname=FS1
}
C 900 84800 1 90 0 EMBEDDEDbusripper-1.sym
[
P 900 84800 800 84900 1 0 0
{
T 400 84800 5 8 0 0 90 0 1
pinseq=1
T 300 84800 5 8 0 0 90 0 1
pinnumber=1
T 200 84800 5 8 0 0 90 0 1
pintype=pas
T 100 84800 5 8 0 0 90 0 1
pinlabel=netside
}
L 700 85000 800 84900 10 30 0 0 -1 -1
T 500 84800 5 8 0 0 90 0 1
device=none
T 600 84800 5 8 0 0 90 0 1
graphical=1
]
N 4300 84200 900 84200 4
{
T 1005 84242 5 10 1 1 180 8 1
netname=CLK1
}
C 900 84200 1 90 0 EMBEDDEDbusripper-1.sym
[
P 900 84200 800 84300 1 0 0
{
T 400 84200 5 8 0 0 90 0 1
pinseq=1
T 300 84200 5 8 0 0 90 0 1
pinnumber=1
T 200 84200 5 8 0 0 90 0 1
pintype=pas
T 100 84200 5 8 0 0 90 0 1
pinlabel=netside
}
L 700 84400 800 84300 10 30 0 0 -1 -1
T 500 84200 5 8 0 0 90 0 1
device=none
T 600 84200 5 8 0 0 90 0 1
graphical=1
]
N 3400 84800 3400 84000 4
N 3400 84000 4300 84000 4
N 4300 84600 900 84600 4
{
T 1005 84642 5 10 1 1 180 8 1
netname=DR1
}
C 900 84600 1 90 0 EMBEDDEDbusripper-1.sym
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