v 20060906 1
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{
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T 51300 84900 5 10 1 1 0 0 1
comment=DNL
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C 54300 80100 1 0 0 bf-3.3V-plus-1.sym
C 57300 82200 1 0 1 bf-sdcard-1.sym
{
T 55600 82200 5 10 1 1 0 6 1
refdes=J6
T 55200 84700 5 10 1 1 0 0 1
comment=DNL
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N 52200 81900 53000 81900 4
{
T 52500 81950 5 10 1 1 0 0 1
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N 52200 81600 53000 81600 4
{
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N 53000 80800 52200 80800 4
{
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N 53000 80500 52200 80500 4
{
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netname=PCLK
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N 52200 80200 53000 80200 4
{
T 52500 80250 5 10 1 1 0 0 1
netname=DTX
}
N 52200 79900 53000 79900 4
{
T 52500 79950 5 10 1 1 0 0 1
netname=DRX
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C 53200 79100 1 0 0 bf-resistor-1.sym
{
T 53800 79500 5 10 1 1 180 0 1
refdes=R56
T 53200 79100 5 10 0 0 0 0 1
footprint=bf_0603
T 53700 79000 5 10 1 1 180 0 1
value=0
T 53500 79600 5 10 1 1 0 0 1
comment=DNL
}
N 54100 79200 55300 79200 4
{
T 54800 79250 5 10 1 1 0 0 1
netname=nINT
}
N 52200 78100 53600 78100 4
{
T 52500 78150 5 10 1 1 0 0 1
netname=nRST
}
C 71800 77900 1 180 0 bf-resistor-1.sym
{
T 71400 78100 5 10 1 1 180 0 1
refdes=R22
T 71800 77900 5 10 0 0 180 0 1
footprint=0805
T 71700 78100 5 10 1 1 180 0 1
value=0
T 71800 77900 5 10 0 0 90 0 1
comment=0.125W 5%
}
C 57700 84100 1 0 1 bf-3.3V-plus-1.sym
C 57600 82900 1 0 1 bf-gnd-1.sym
N 55100 83300 54500 83300 4
{
T 54550 83350 5 10 1 1 0 0 1
netname=SCLK
}
C 50400 69600 0 0 0 title-bordered-C.sym
N 57300 83200 57300 82900 4
C 57300 83200 1 270 1 bf-capacitor-1.sym
{
T 57800 83900 5 10 1 1 180 6 1
refdes=C114
T 57800 83700 5 10 1 1 180 6 1
value=0.1uF
T 57300 83200 5 10 0 0 90 2 1
footprint=bf_0603
T 57300 83200 5 10 0 0 0 6 1
comment=16V X7R 20%
}
C 52100 77100 1 0 0 bf-3.3V-plus-1.sym
C 53100 75900 1 0 0 bf-gnd-1.sym
N 52200 76200 53200 76200 4
T 51000 84400 9 10 1 0 0 0 2
SPORT
FEMALE
N 52200 76800 52200 77100 4
N 52200 76200 52200 75000 4
N 52200 77700 52900 77700 4
{
T 52550 77750 5 10 1 1 0 0 1
netname=PF5
}
T 65200 70500 9 10 1 0 0 0 1
IP04 Four Port IP-PBX
T 69200 69900 9 10 1 0 0 0 1
David Rowe
T 69200 70200 9 10 1 0 0 0 1
$Revision$
T 65800 69900 9 10 1 0 0 0 1
3
T 67100 69900 9 10 1 0 0 0 1
3
T 65300 70200 9 10 1 0 0 0 1
ip04_4fx.sch
C 54600 79200 1 90 0 bf-resistor-1.sym
{
T 55200 80100 5 10 1 1 180 0 1
refdes=R122
T 54600 79200 5 10 0 0 90 0 1
footprint=bf_0603
T 55000 79900 5 10 1 1 180 0 1
value=10k
}
C 71800 77300 1 180 0 bf-resistor-1.sym
{
T 71400 77500 5 10 1 1 180 0 1
refdes=R23
T 71800 77300 5 10 0 0 180 0 1
footprint=0805
T 71800 77300 5 10 0 0 90 0 1
comment=0.125W 5%
T 71700 77500 5 10 1 1 180 0 1
value=0
}
C 72000 76900 1 0 0 bf-gnd-1.sym
C 64300 76300 1 270 0 nc-left-1.sym
{
T 6085 84950 5 10 0 0 0 0 1
value=NoConnection
T 5800 85500 5 10 0 0 0 0 1
device=DRC_Directive
}
C 64500 74300 1 90 0 nc-left-1.sym
{
T 6085 84550 5 10 0 0 0 0 1
value=NoConnection
T 5800 85100 5 10 0 0 0 0 1
device=DRC_Directive
}
C 63900 74900 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 63900 75500 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
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T 5600 85300 5 10 0 0 0 0 1
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C 52700 73700 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
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C 52700 73200 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
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C 52700 72600 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
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C 52700 72300 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
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C 52700 72000 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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C 52700 71500 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 52700 71200 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
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C 52700 70900 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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device=DRC_Directive
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C 52700 70600 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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T 6000 85300 5 10 0 0 0 0 1
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C 52700 70300 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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T 6000 85300 5 10 0 0 0 0 1
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C 54600 84000 1 0 0 nc-left-1.sym
{
T 6685 84750 5 10 0 0 0 0 1
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C 54600 83700 1 0 0 nc-left-1.sym
{
T 6685 84750 5 10 0 0 0 0 1
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N 58000 82600 57300 82600 4
{
T 58000 82700 5 10 1 1 0 6 1
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L 55800 85700 55800 85500 3 0 0 0 -1 -1
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L 57350 85300 57450 85100 3 0 0 0 -1 -1
L 57350 85100 57450 85300 3 0 0 0 -1 -1
T 54650 85950 9 10 1 0 0 0 1
FSYNC
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PCLK
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DTX/DRX
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L 60250 85100 60350 85300 3 0 0 0 -1 -1
T 57750 85550 9 10 1 0 0 0 1
nCS
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SCLK
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L 60100 86100 60300 86100 3 0 0 0 -1 -1
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T 56024 85201 9 8 1 0 0 4 1
msb
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L 59050 84700 59150 84900 3 0 0 0 -1 -1
L 59150 84900 59450 84900 3 0 0 0 -1 -1
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L 61800 84700 61850 84800 3 0 0 0 -1 -1
T 57750 84750 9 10 1 0 0 0 1
SDO
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L 61850 84800 62100 84800 3 0 0 0 -1 -1
N 52200 81100 52400 81100 4
N 52400 81100 52400 80500 4
T 58924 85201 9 8 1 0 0 4 1
msb
T 58924 84801 9 8 1 0 0 4 1
msb
C 65300 74400 1 0 1 bf-rj12-1.sym
{
T 65300 74400 5 10 1 1 0 6 1
refdes=J1C
}
N 59200 80300 59900 80300 4
{
T 59200 80350 5 10 1 1 0 0 1
netname=BBSCLK
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N 59200 79700 59900 79700 4
{
T 59200 79750 5 10 1 1 0 0 1
netname=BBSDO
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N 59200 78800 59900 78800 4
{
T 59300 78850 5 10 1 1 0 0 1
netname=FSYNC
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N 59200 78500 59900 78500 4
{
T 59300 78550 5 10 1 1 0 0 1
netname=PCLK
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N 59200 78200 59900 78200 4
{
T 59300 78250 5 10 1 1 0 0 1
netname=DRX
}
N 59200 77900 59900 77900 4
{
T 59300 77950 5 10 1 1 0 0 1
netname=DTX
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N 59200 77300 59900 77300 4
{
T 59300 77350 5 10 1 1 0 0 1
netname=nINT
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N 59200 80000 59900 80000 4
{
T 59200 80050 5 10 1 1 0 0 1
netname=BBSDI
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N 59200 77000 59900 77000 4
{
T 59300 77050 5 10 1 1 0 0 1
netname=nRST
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N 59200 79400 59900 79400 4
{
T 59300 79450 5 10 1 1 0 0 1
netname=nCS1
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C 57400 76200 1 0 0 bf-header20-1.sym
{
T 60200 80600 5 10 1 1 0 0 1
refdes=J1A
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C 61200 76700 1 0 0 bf-gnd-1.sym
N 61300 77000 61300 77300 4
C 61100 78200 1 0 0 bf-3.3V-plus-1.sym
C 60900 80400 1 0 0 bf-unreg-1.sym
N 61300 80300 61300 80400 4
C 61800 79600 1 0 1 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 62200 74300 1 0 0 bf-resistor-1.sym
{
T 62500 74600 5 10 1 1 0 0 1
refdes=R24
T 62200 74300 5 10 0 0 0 0 1
footprint=bf_0805
T 63000 74600 5 10 1 1 0 0 1
value=0
T 62200 74300 5 10 0 0 0 0 1
comment=0.125W
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C 62000 75300 1 90 0 bf-capacitor-1.sym
{
T 61300 75700 5 10 1 1 180 0 1
refdes=C5
T 61600 75500 5 10 1 1 180 0 1
value=680pF
T 62000 75300 5 10 0 0 90 0 1
footprint=bf_2211
T 62000 75300 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 60100 74300 1 0 0 bf-inductor-1.sym
{
T 59800 74200 5 10 1 1 0 0 1
refdes=FB1
T 60300 74200 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 60100 74300 5 10 0 0 0 0 1
footprint=bf_0805
T 60100 74300 5 10 0 0 0 0 1
comment=Murata
}
C 63800 74800 1 90 0 bf-varistor-1.sym
{
T 63400 75400 5 10 1 1 180 0 1
refdes=RV1
T 63800 74800 5 10 0 0 0 0 1
footprint=bf_2010
T 63000 75000 5 10 1 1 0 0 1
value=275V
T 63800 74800 5 10 0 0 0 0 1
comment=Sidactor 100A Teccor P3100SB
}
N 61000 76200 62300 76200 4
N 61000 74400 62200 74400 4
N 63200 76200 64100 76200 4
{
T 63600 76300 5 10 1 1 0 0 1
netname=RING1
}
N 63100 74400 64100 74400 4
{
T 63600 74200 5 10 1 1 0 0 1
netname=TIP1
}
N 63600 74800 63600 74400 4
C 60100 76100 1 0 0 bf-inductor-1.sym
{
T 59800 76400 5 10 1 1 0 0 1
refdes=FB2
T 60300 76400 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 60100 76100 5 10 0 0 0 0 1
footprint=bf_0805
T 60100 76100 5 10 0 0 0 0 1
comment=Murata
}
C 62000 74400 1 90 0 bf-capacitor-1.sym
{
T 61300 75200 5 10 1 1 180 0 1
refdes=C6
T 61600 75000 5 10 1 1 180 0 1
value=680pF
T 62000 74400 5 10 0 0 90 0 1
footprint=bf_2211
T 62000 74400 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 62300 76100 1 0 0 bf-resistor-1.sym
{
T 62600 76400 5 10 1 1 0 0 1
refdes=R125
T 62300 76100 5 10 0 0 0 0 1
footprint=bf_0805
T 63100 76400 5 10 1 1 0 0 1
value=0
T 62300 76100 5 10 0 0 0 0 1
comment=0.125W
}
C 62100 74900 1 0 0 bf-earth.sym
{
T 62100 74900 5 10 0 0 0 0 1
netname=TGND
}
N 63600 75700 63600 76200 4
N 62300 75300 61800 75300 4
{
T 62300 75300 5 10 0 0 0 0 1
netname=TGND
}
C 61800 79400 1 0 1 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 61800 79200 1 0 1 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 61800 79000 1 0 1 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 61800 78800 1 0 1 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
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C 61800 78600 1 0 1 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
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T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
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N 64100 76200 64100 75400 4
N 64100 75400 64400 75400 4
N 64400 75200 64100 75200 4
N 64100 75200 64100 74400 4
C 59200 74900 1 0 0 bf-header2-1.sym
{
T 59200 74700 5 10 1 1 0 0 1
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N 60100 76200 60100 75400 4
N 60100 74400 60100 75100 4
N 62100 80300 62800 80300 4
{
T 62100 80350 5 10 1 1 0 0 1
netname=BBSCLK
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N 62100 79700 62800 79700 4
{
T 62100 79750 5 10 1 1 0 0 1
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N 62100 78800 62800 78800 4
{
T 62200 78850 5 10 1 1 0 0 1
netname=FSYNC
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N 62100 78500 62800 78500 4
{
T 62200 78550 5 10 1 1 0 0 1
netname=PCLK
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N 62100 78200 62800 78200 4
{
T 62200 78250 5 10 1 1 0 0 1
netname=DRX
}
N 62100 77900 62800 77900 4
{
T 62200 77950 5 10 1 1 0 0 1
netname=DTX
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N 62100 77300 62800 77300 4
{
T 62200 77350 5 10 1 1 0 0 1
netname=nINT
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N 62100 80000 62800 80000 4
{
T 62100 80050 5 10 1 1 0 0 1
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}
N 62100 77000 62800 77000 4
{
T 62200 77050 5 10 1 1 0 0 1
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N 62100 79400 62800 79400 4
{
T 62200 79450 5 10 1 1 0 0 1
netname=nCS2
}
C 60300 76200 1 0 0 bf-header20-1.sym
{
T 63100 80600 5 10 1 1 0 0 1
refdes=J2A
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C 64100 76700 1 0 0 bf-gnd-1.sym
N 64200 77000 64200 77300 4
C 64000 78200 1 0 0 bf-3.3V-plus-1.sym
C 63800 80400 1 0 0 bf-unreg-1.sym
N 64200 80300 64200 80400 4
C 64700 79600 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 64700 79400 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 64700 79200 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 64700 79000 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 64700 78800 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
value=NoConnection
T 6000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 64700 78600 1 0 1 nc-left-1.sym
{
T 6285 84750 5 10 0 0 0 0 1
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T 6000 85300 5 10 0 0 0 0 1
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N 65200 80300 65900 80300 4
{
T 65200 80350 5 10 1 1 0 0 1
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N 65200 79700 65900 79700 4
{
T 65200 79750 5 10 1 1 0 0 1
netname=BBSDO
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N 65200 78800 65900 78800 4
{
T 65300 78850 5 10 1 1 0 0 1
netname=FSYNC
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N 65200 78500 65900 78500 4
{
T 65300 78550 5 10 1 1 0 0 1
netname=PCLK
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N 65200 78200 65900 78200 4
{
T 65300 78250 5 10 1 1 0 0 1
netname=DRX
}
N 65200 77900 65900 77900 4
{
T 65300 77950 5 10 1 1 0 0 1
netname=DTX
}
N 65200 77300 65900 77300 4
{
T 65300 77350 5 10 1 1 0 0 1
netname=nINT
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N 65200 80000 65900 80000 4
{
T 65200 80050 5 10 1 1 0 0 1
netname=BBSDI
}
N 65200 77000 65900 77000 4
{
T 65300 77050 5 10 1 1 0 0 1
netname=nRST
}
N 65200 79400 65900 79400 4
{
T 65300 79450 5 10 1 1 0 0 1
netname=nCS3
}
C 63400 76200 1 0 0 bf-header20-1.sym
{
T 66200 80600 5 10 1 1 0 0 1
refdes=J3A
}
C 67200 76700 1 0 0 bf-gnd-1.sym
N 67300 77000 67300 77300 4
C 67100 78200 1 0 0 bf-3.3V-plus-1.sym
C 66900 80400 1 0 0 bf-unreg-1.sym
N 67300 80300 67300 80400 4
C 67800 79600 1 0 1 nc-left-1.sym
{
T 6885 84750 5 10 0 0 0 0 1
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T 6600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 67800 79400 1 0 1 nc-left-1.sym
{
T 6885 84750 5 10 0 0 0 0 1
value=NoConnection
T 6600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 67800 79200 1 0 1 nc-left-1.sym
{
T 6885 84750 5 10 0 0 0 0 1
value=NoConnection
T 6600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 67800 79000 1 0 1 nc-left-1.sym
{
T 6885 84750 5 10 0 0 0 0 1
value=NoConnection
T 6600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 67800 78800 1 0 1 nc-left-1.sym
{
T 6885 84750 5 10 0 0 0 0 1
value=NoConnection
T 6600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 67800 78600 1 0 1 nc-left-1.sym
{
T 6885 84750 5 10 0 0 0 0 1
value=NoConnection
T 6600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
N 68100 80300 68800 80300 4
{
T 68100 80350 5 10 1 1 0 0 1
netname=BBSCLK
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N 68100 79700 68800 79700 4
{
T 68100 79750 5 10 1 1 0 0 1
netname=BBSDO
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N 68100 78800 68800 78800 4
{
T 68200 78850 5 10 1 1 0 0 1
netname=FSYNC
}
N 68100 78500 68800 78500 4
{
T 68200 78550 5 10 1 1 0 0 1
netname=PCLK
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N 68100 78200 68800 78200 4
{
T 68200 78250 5 10 1 1 0 0 1
netname=DRX
}
N 68100 77900 68800 77900 4
{
T 68200 77950 5 10 1 1 0 0 1
netname=DTX
}
N 68100 77300 68800 77300 4
{
T 68200 77350 5 10 1 1 0 0 1
netname=nINT
}
N 68100 80000 68800 80000 4
{
T 68100 80050 5 10 1 1 0 0 1
netname=BBSDI
}
N 68100 77000 68800 77000 4
{
T 68200 77050 5 10 1 1 0 0 1
netname=nRST
}
N 68100 79400 68800 79400 4
{
T 68200 79450 5 10 1 1 0 0 1
netname=nCS4
}
C 66300 76200 1 0 0 bf-header20-1.sym
{
T 69100 80600 5 10 1 1 0 0 1
refdes=J4A
}
C 70100 76700 1 0 0 bf-gnd-1.sym
N 70200 77000 70200 77300 4
C 70000 78200 1 0 0 bf-3.3V-plus-1.sym
C 69800 80400 1 0 0 bf-unreg-1.sym
N 70200 80300 70200 80400 4
C 70700 79600 1 0 1 nc-left-1.sym
{
T 7285 84750 5 10 0 0 0 0 1
value=NoConnection
T 7000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70700 79400 1 0 1 nc-left-1.sym
{
T 7285 84750 5 10 0 0 0 0 1
value=NoConnection
T 7000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70700 79200 1 0 1 nc-left-1.sym
{
T 7285 84750 5 10 0 0 0 0 1
value=NoConnection
T 7000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70700 79000 1 0 1 nc-left-1.sym
{
T 7285 84750 5 10 0 0 0 0 1
value=NoConnection
T 7000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70700 78800 1 0 1 nc-left-1.sym
{
T 7285 84750 5 10 0 0 0 0 1
value=NoConnection
T 7000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70700 78600 1 0 1 nc-left-1.sym
{
T 7285 84750 5 10 0 0 0 0 1
value=NoConnection
T 7000 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70700 76300 1 270 0 nc-left-1.sym
{
T 6085 84950 5 10 0 0 0 0 1
value=NoConnection
T 5800 85500 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70900 74300 1 90 0 nc-left-1.sym
{
T 6085 84550 5 10 0 0 0 0 1
value=NoConnection
T 5800 85100 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70300 74900 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70300 75500 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 71700 74400 1 0 1 bf-rj12-1.sym
{
T 71700 74400 5 10 1 1 0 6 1
refdes=J2C
}
C 68600 74300 1 0 0 bf-resistor-1.sym
{
T 68900 74600 5 10 1 1 0 0 1
refdes=R126
T 68600 74300 5 10 0 0 0 0 1
footprint=bf_0805
T 69400 74600 5 10 1 1 0 0 1
value=0
T 68600 74300 5 10 0 0 0 0 1
comment=0.125W
}
C 68400 75300 1 90 0 bf-capacitor-1.sym
{
T 67700 75700 5 10 1 1 180 0 1
refdes=C137
T 68000 75500 5 10 1 1 180 0 1
value=680pF
T 68400 75300 5 10 0 0 90 0 1
footprint=bf_2211
T 68400 75300 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 66500 74300 1 0 0 bf-inductor-1.sym
{
T 66200 74200 5 10 1 1 0 0 1
refdes=FB3
T 66700 74200 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 66500 74300 5 10 0 0 0 0 1
footprint=bf_0805
T 66500 74300 5 10 0 0 0 0 1
comment=Murata
}
C 70200 74800 1 90 0 bf-varistor-1.sym
{
T 69800 75400 5 10 1 1 180 0 1
refdes=RV2
T 70200 74800 5 10 0 0 0 0 1
footprint=bf_2010
T 69400 75000 5 10 1 1 0 0 1
value=275V
T 70200 74800 5 10 0 0 0 0 1
comment=Sidactor 100A Teccor P3100SB
}
N 67400 76200 68700 76200 4
N 67400 74400 68600 74400 4
N 69600 76200 70500 76200 4
{
T 70000 76300 5 10 1 1 0 0 1
netname=RING2
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N 69500 74400 70500 74400 4
{
T 70000 74200 5 10 1 1 0 0 1
netname=TIP2
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N 70000 74800 70000 74400 4
C 66500 76100 1 0 0 bf-inductor-1.sym
{
T 66200 76400 5 10 1 1 0 0 1
refdes=FB4
T 66700 76400 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 66500 76100 5 10 0 0 0 0 1
footprint=bf_0805
T 66500 76100 5 10 0 0 0 0 1
comment=Murata
}
C 68400 74400 1 90 0 bf-capacitor-1.sym
{
T 67700 75200 5 10 1 1 180 0 1
refdes=C108
T 68000 75000 5 10 1 1 180 0 1
value=680pF
T 68400 74400 5 10 0 0 90 0 1
footprint=bf_2211
T 68400 74400 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 68700 76100 1 0 0 bf-resistor-1.sym
{
T 69000 76400 5 10 1 1 0 0 1
refdes=R27
T 68700 76100 5 10 0 0 0 0 1
footprint=bf_0805
T 69500 76400 5 10 1 1 0 0 1
value=0
T 68700 76100 5 10 0 0 0 0 1
comment=0.125W
}
C 68500 74900 1 0 0 bf-earth.sym
N 70000 75700 70000 76200 4
N 68700 75300 68200 75300 4
{
T 68700 75300 5 10 0 0 0 0 1
netname=TGND
}
N 70500 76200 70500 75400 4
N 70500 75400 70800 75400 4
N 70800 75200 70500 75200 4
N 70500 75200 70500 74400 4
C 65600 74900 1 0 0 bf-header2-1.sym
{
T 65600 74700 5 10 1 1 0 0 1
refdes=J2B
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N 66500 76200 66500 75400 4
N 66500 74400 66500 75100 4
N 52300 77100 52200 77100 4
C 64300 73800 1 270 0 nc-left-1.sym
{
T 6085 84950 5 10 0 0 0 0 1
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T 5800 85500 5 10 0 0 0 0 1
device=DRC_Directive
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C 64500 71800 1 90 0 nc-left-1.sym
{
T 6085 84550 5 10 0 0 0 0 1
value=NoConnection
T 5800 85100 5 10 0 0 0 0 1
device=DRC_Directive
}
C 63900 72400 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 63900 73000 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 65300 71900 1 0 1 bf-rj12-1.sym
{
T 65300 71900 5 10 1 1 0 6 1
refdes=J3C
}
C 62200 71800 1 0 0 bf-resistor-1.sym
{
T 62500 72100 5 10 1 1 0 0 1
refdes=R28
T 62200 71800 5 10 0 0 0 0 1
footprint=bf_0805
T 63000 72100 5 10 1 1 0 0 1
value=0
T 62200 71800 5 10 0 0 0 0 1
comment=0.125W
}
C 62000 72800 1 90 0 bf-capacitor-1.sym
{
T 61300 73200 5 10 1 1 180 0 1
refdes=C109
T 61600 73000 5 10 1 1 180 0 1
value=680pF
T 62000 72800 5 10 0 0 90 0 1
footprint=bf_2211
T 62000 72800 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 60100 71800 1 0 0 bf-inductor-1.sym
{
T 60200 72200 5 10 1 1 0 0 1
refdes=FB5
T 60200 72000 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 60100 71800 5 10 0 0 0 0 1
footprint=bf_0805
T 60100 71800 5 10 0 0 0 0 1
comment=Murata
}
C 63800 72300 1 90 0 bf-varistor-1.sym
{
T 63400 72900 5 10 1 1 180 0 1
refdes=RV3
T 63800 72300 5 10 0 0 0 0 1
footprint=bf_2010
T 63000 72500 5 10 1 1 0 0 1
value=275V
T 63800 72300 5 10 0 0 0 0 1
comment=Sidactor 100A Teccor P3100SB
}
N 61000 73700 62300 73700 4
N 61000 71900 62200 71900 4
N 63200 73700 64100 73700 4
{
T 63600 73800 5 10 1 1 0 0 1
netname=RING3
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N 63100 71900 64100 71900 4
{
T 63700 72000 5 10 1 1 0 0 1
netname=TIP3
}
N 63600 72300 63600 71900 4
C 60100 73600 1 0 0 bf-inductor-1.sym
{
T 59800 73900 5 10 1 1 0 0 1
refdes=FB6
T 60300 73900 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 60100 73600 5 10 0 0 0 0 1
footprint=bf_0805
T 60100 73600 5 10 0 0 0 0 1
comment=Murata
}
C 62000 71900 1 90 0 bf-capacitor-1.sym
{
T 61300 72700 5 10 1 1 180 0 1
refdes=C121
T 61600 72500 5 10 1 1 180 0 1
value=680pF
T 62000 71900 5 10 0 0 90 0 1
footprint=bf_2211
T 62000 71900 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 62300 73600 1 0 0 bf-resistor-1.sym
{
T 62600 73900 5 10 1 1 0 0 1
refdes=R29
T 62300 73600 5 10 0 0 0 0 1
footprint=bf_0805
T 63100 73900 5 10 1 1 0 0 1
value=0
T 62300 73600 5 10 0 0 0 0 1
comment=0.125W
}
C 62100 72400 1 0 0 bf-earth.sym
N 63600 73200 63600 73700 4
N 62300 72800 61800 72800 4
{
T 62300 72800 5 10 0 0 0 0 1
netname=TGND
}
N 64100 73700 64100 72900 4
N 64100 72900 64400 72900 4
N 64400 72700 64100 72700 4
N 64100 72700 64100 71900 4
C 59200 72400 1 0 0 bf-header2-1.sym
{
T 59200 72200 5 10 1 1 0 0 1
refdes=J3B
}
N 60100 73700 60100 72900 4
N 60100 71900 60100 72600 4
C 70700 73800 1 270 0 nc-left-1.sym
{
T 6085 84950 5 10 0 0 0 0 1
value=NoConnection
T 5800 85500 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70900 71800 1 90 0 nc-left-1.sym
{
T 6085 84550 5 10 0 0 0 0 1
value=NoConnection
T 5800 85100 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70300 72400 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 70300 73000 1 0 0 nc-left-1.sym
{
T 5885 84750 5 10 0 0 0 0 1
value=NoConnection
T 5600 85300 5 10 0 0 0 0 1
device=DRC_Directive
}
C 71700 71900 1 0 1 bf-rj12-1.sym
{
T 71700 71900 5 10 1 1 0 6 1
refdes=J4C
}
C 68600 71800 1 0 0 bf-resistor-1.sym
{
T 68900 72100 5 10 1 1 0 0 1
refdes=R30
T 68600 71800 5 10 0 0 0 0 1
footprint=bf_0805
T 69400 72100 5 10 1 1 0 0 1
value=0
T 68600 71800 5 10 0 0 0 0 1
comment=0.125W
}
C 68400 72800 1 90 0 bf-capacitor-1.sym
{
T 67700 73200 5 10 1 1 180 0 1
refdes=C111
T 68000 73000 5 10 1 1 180 0 1
value=680pF
T 68400 72800 5 10 0 0 90 0 1
footprint=bf_2211
T 68400 72800 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 66500 71800 1 0 0 bf-inductor-1.sym
{
T 66200 71700 5 10 1 1 0 0 1
refdes=FB7
T 66700 71700 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 66500 71800 5 10 0 0 0 0 1
footprint=bf_0805
T 66500 71800 5 10 0 0 0 0 1
comment=Murata
}
C 70200 72300 1 90 0 bf-varistor-1.sym
{
T 69800 72900 5 10 1 1 180 0 1
refdes=RV4
T 70200 72300 5 10 0 0 0 0 1
footprint=bf_2010
T 69400 72500 5 10 1 1 0 0 1
value=275V
T 70200 72300 5 10 0 0 0 0 1
comment=Sidactor 100A Teccor P3100SB
}
N 67400 73700 68700 73700 4
N 67400 71900 68600 71900 4
N 69600 73700 70500 73700 4
{
T 70000 73800 5 10 1 1 0 0 1
netname=RING4
}
N 69500 71900 70500 71900 4
{
T 70000 71700 5 10 1 1 0 0 1
netname=TIP4
}
N 70000 72300 70000 71900 4
C 66500 73600 1 0 0 bf-inductor-1.sym
{
T 66200 73900 5 10 1 1 0 0 1
refdes=FB8
T 66700 73900 5 10 1 1 0 0 1
value=BLM18AG601SN1
T 66500 73600 5 10 0 0 0 0 1
footprint=bf_0805
T 66500 73600 5 10 0 0 0 0 1
comment=Murata
}
C 68400 71900 1 90 0 bf-capacitor-1.sym
{
T 67700 72700 5 10 1 1 180 0 1
refdes=C112
T 68000 72500 5 10 1 1 180 0 1
value=680pF
T 68400 71900 5 10 0 0 90 0 1
footprint=bf_2211
T 68400 71900 5 10 0 0 0 0 1
comment=Y2 X7R 10% Murata GA352QR7GF681KW01L
}
C 68700 73600 1 0 0 bf-resistor-1.sym
{
T 69000 73900 5 10 1 1 0 0 1
refdes=R31
T 68700 73600 5 10 0 0 0 0 1
footprint=bf_0805
T 69500 73900 5 10 1 1 0 0 1
value=0
T 68700 73600 5 10 0 0 0 0 1
comment=0.125W
}
C 68500 72400 1 0 0 bf-earth.sym
N 70000 73200 70000 73700 4
N 68700 72800 68200 72800 4
{
T 68700 72800 5 10 0 0 0 0 1
netname=TGND
}
N 70500 73700 70500 72900 4
N 70500 72900 70800 72900 4
N 70800 72700 70500 72700 4
N 70500 72700 70500 71900 4
C 65600 72400 1 0 0 bf-header2-1.sym
{
T 65600 72200 5 10 1 1 0 0 1
refdes=J4B
}
N 66500 73700 66500 72900 4
N 66500 71900 66500 72600 4
C 52800 74100 1 0 1 bf-unreg-1.sym
N 52200 74100 52400 74100 4
C 57000 74100 1 180 1 bf-resistor-1.sym
{
T 57500 73800 5 10 1 1 180 6 1
refdes=R36
T 57000 74100 5 10 0 0 180 6 1
footprint=bf_0603
T 56900 73800 5 10 1 1 180 6 1
value=120
T 57000 74100 5 10 0 0 90 2 1
comment=0.125W 5%
}
C 57100 72300 1 0 1 bf-led-bicolor.sym
{
T 56150 72750 5 10 1 1 0 6 1
refdes=LED4
T 57100 72300 5 10 0 1 0 6 1
footprint=bf_LED
}
C 57000 72900 1 180 1 bf-resistor-1.sym
{
T 57500 72600 5 10 1 1 180 6 1
refdes=R55
T 57000 72900 5 10 0 0 180 6 1
footprint=bf_0603
T 56900 72600 5 10 1 1 180 6 1
value=120
T 57000 72900 5 10 0 0 90 2 1
comment=0.125W 5%
}
C 57100 73500 1 0 1 bf-led-bicolor.sym
{
T 56100 73950 5 10 1 1 0 6 1
refdes=LED3
T 57100 73500 5 10 0 1 0 6 1
footprint=bf_LED
}
N 58800 73500 56200 73500 4
{
T 58200 73550 5 10 1 1 0 0 1
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N 56200 72200 58700 72200 4
{
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N 56200 72200 56200 72800 4
C 57000 76500 1 180 1 bf-resistor-1.sym
{
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T 56900 76200 5 10 1 1 180 6 1
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T 57000 76500 5 10 0 0 90 2 1
comment=0.125W 5%
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C 57100 74700 1 0 1 bf-led-bicolor.sym
{
T 56150 75150 5 10 1 1 0 6 1
refdes=LED2
T 57100 74700 5 10 0 1 0 0 1
footprint=bf_LED
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C 57000 75300 1 180 1 bf-resistor-1.sym
{
T 57500 75000 5 10 1 1 180 6 1
refdes=R139
T 57000 75300 5 10 0 0 180 6 1
footprint=bf_0603
T 56900 75000 5 10 1 1 180 6 1
value=120
T 57000 75300 5 10 0 0 90 2 1
comment=0.125W 5%
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C 57100 75900 1 0 1 bf-led-bicolor.sym
{
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T 57100 75900 5 10 0 1 0 0 1
footprint=bf_LED
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N 56200 75800 58800 75800 4
{
T 58200 75850 5 10 1 1 0 0 1
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N 56200 75800 56200 76400 4
N 56200 74600 58800 74600 4
{
T 58200 74650 5 10 1 1 0 0 1
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N 56200 74600 56200 75200 4
N 58800 76400 57900 76400 4
{
T 58200 76450 5 10 1 1 0 0 1
netname=LED1A
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N 58800 75200 57900 75200 4
{
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C 70400 76800 1 0 0 bf-earth.sym
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{
T 71200 77200 5 10 0 0 0 0 1
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N 70900 77200 70900 77800 4
N 71800 77800 71800 77200 4
N 71800 77200 72100 77200 4
N 56200 74000 56200 73500 4
N 58800 74000 57900 74000 4
{
T 58200 74050 5 10 1 1 0 0 1
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N 58800 72800 57900 72800 4
{
T 58200 72850 5 10 1 1 0 0 1
netname=LED4A
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C 57000 79400 1 270 0 bf-capacitor-2.sym
{
T 57000 78000 5 10 1 1 0 0 1
refdes=C98
T 57000 77800 5 10 1 1 0 0 1
value=10uF 25V
T 57000 79400 5 10 0 1 0 0 1
footprint=bf_2010pol
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C 56000 79400 1 270 0 bf-capacitor-2.sym
{
T 56000 78000 5 10 1 1 0 0 1
refdes=C117
T 56000 77800 5 10 1 1 0 0 1
value=10uF 25V
T 56000 79400 5 10 0 1 0 0 1
footprint=bf_2010pol
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C 58000 79400 1 270 0 bf-capacitor-2.sym
{
T 58000 78000 5 10 1 1 0 0 1
refdes=C119
T 58000 77800 5 10 1 1 0 0 1
value=10uF 25V
T 58000 79400 5 10 0 1 0 0 1
footprint=bf_2010pol
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C 56800 79400 1 0 0 bf-unreg-1.sym
C 57100 78200 1 0 0 bf-gnd-1.sym
C 70700 80300 1 270 0 bf-capacitor-1.sym
{
T 71100 80000 5 10 1 1 0 0 1
refdes=C120
T 71100 79600 5 10 1 1 0 0 1
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T 70700 80300 5 10 0 1 0 0 1
footprint=bf_2010pol
}
C 70800 79100 1 0 0 EMBEDDEDgnd-1.sym
[
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{
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C 70700 80300 1 0 0 bf-3.3V-plus-1.sym
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{
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{
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{
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{
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{
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{
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C 53500 78100 1 270 0 bf-resistor-1.sym
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C 53500 76900 1 0 0 bf-gnd-1.sym
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{
T 52450 83950 5 10 1 1 0 0 1
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{
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C 70300 82900 1 90 0 EMBEDDEDcapacitor-d2.sym
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P 70100 82000 70100 82200 1 0 0
{
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L 69900 82500 70300 82500 3 0 0 0 -1 -1
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T 69200 82700 5 10 0 0 90 6 1
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{
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C 71700 82900 1 0 0 EMBEDDED3.3V.sym
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L 71650 83100 71350 83100 3 0 0 0 -1 -1
T 71625 83150 9 8 1 0 0 6 1
+3.3V
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C 63900 81000 1 0 0 EMBEDDEDgnd-1.sym
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C 61000 83300 1 180 0 EMBEDDEDdiode-d.sym
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L 61700 83100 61600 83100 3 0 0 0 -1 -1
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{
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value=1N5819
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C 65700 83100 1 90 0 EMBEDDEDcapacitor-d2.sym
[
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P 65500 82200 65500 82400 1 0 0
{
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L 65300 82700 65700 82700 3 0 0 0 -1 -1
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L 65500 82700 65500 82900 3 0 0 0 -1 -1
A 65500 81900 700 75 30 3 0 0 0 -1 -1
L 65300 82811 65400 82811 3 0 0 0 -1 -1
L 65351 82760 65351 82860 3 0 0 0 -1 -1
T 64600 82900 5 10 0 0 90 6 1
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{
T 65300 83400 5 10 1 1 0 0 1
refdes=C166
T 65300 83200 5 10 1 1 0 0 1
value=220uF 25V
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footprint=bf_cap-elec-10mm-5mm
}
C 58800 82800 1 0 0 bf-dcjack.sym
{
T 59200 83300 5 10 1 1 0 6 1
refdes=J9
T 58500 84100 5 10 0 1 0 0 1
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footprint=bf_DCJACK
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C 63700 82200 1 270 0 bf-resistor-1.sym
{
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C 63200 83100 1 90 1 transformer-2.sym
{
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refdes=T4
T 62000 83400 5 10 1 1 0 0 1
description=Murata DLW5BS
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footprint=bf_CHOKE
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value=DLW5BTN101SQ2L
}
C 59500 81800 1 270 0 EMBEDDEDcapacitor-d1.sym
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P 59700 82700 59700 82500 1 0 0
{
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{
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C 60400 81800 1 270 0 EMBEDDEDcapacitor-d1.sym
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{
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value=1nF
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footprint=d0603
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C 60400 81400 1 0 0 bf-earth.sym
{
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C 69000 82800 1 0 0 bf-inductor-1.sym
{
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refdes=L4
T 69000 82800 5 10 0 0 0 0 1
footprint=bf_inductor_4590
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value=API Delevan 4590-333K
}
N 59700 83100 61000 83100 4
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N 59700 82900 61200 82900 4
N 61200 82900 61200 81600 4
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C 66800 82300 1 0 0 lm2596.sym
{
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C 69100 81800 1 90 0 diode-2.sym
{
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value=SB540
T 69100 81800 5 10 0 0 0 0 1
footprint=DO201AD.fp
}
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C 66200 82200 1 270 0 EMBEDDEDcapacitor-d1.sym
[
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P 66400 83100 66400 82900 1 0 0
{
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{
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value=0.1uF
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C 63700 83100 1 270 0 bf-led-1.sym
{
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refdes=D12
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footprint=bf_LED
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comment=DNL
}
C 71300 82000 1 270 0 EMBEDDEDcapacitor-d1.sym
[
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{
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T 71900 82300 5 10 0 0 270 6 1
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{
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value=0.1uF
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}
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N 63800 83500 63800 83100 4
N 65500 81600 71500 81600 4
N 71500 81600 71500 82000 4
N 70100 82000 70100 81600 4
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N 68000 82400 68000 81600 4
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C 65400 81300 1 0 0 gnd-1.sym
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T 59700 83200 9 10 1 0 0 0 1
7 - 20VDC
T 70800 83400 9 10 1 0 0 0 1
3V3 @ 3A
T 65900 81300 9 10 1 0 0 0 1
Use single point grounding and minimise the length of this net
B 62400 84100 9800 2300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 71500 85900 9 10 1 0 180 0 8
This design/schematic/layout is free; you can redistribute it under the terms of the GNU General
Public License as published by the Free Software Foundation; eitherVersion 2 of the License, or 
(at your option) any later version.

This design/schematic/layout is distributed in the hope that it will be useful, but 
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE.  See GNU General Public license for more details.

T 69300 86200 9 12 1 0 180 0 1
COPYRIGHT DAVID ROWE AND BLACKFIN TEAM 2007
T 60400 71600 9 10 1 0 180 0 9
This design is based on the work of many people in the BlackfinOne community. 
Thanks to Ivan Danov, Dimitar Penev, Wojciech Tryc, Levente Kovacs, 
David Rowe, and many others.  We have all worked together and shared to
create great hardware and software - free for all to use!  Thanks also to
Analog Devices for the Blackfin uClinux project.  Apologies if I have forgetten
anyone!



T 54600 71900 9 12 1 0 180 0 1
CREDITS
N 56200 79400 58200 79400 4
N 56200 78500 58200 78500 4
C 55300 80800 1 0 0 bf-osc-1.sym
{
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refdes=U11
}
C 55000 81500 1 0 0 bf-3.3V-plus-1.sym
C 55200 80900 1 0 0 bf-gnd-1.sym
C 55200 81700 1 180 0 bf-capacitor-1.sym
{
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refdes=C116
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value=0.1uF
T 55200 81700 5 10 0 0 180 0 1
footprint=bf_0603
T 55200 81700 5 10 0 0 90 0 1
comment=16V X7R 20%
}
N 55200 81500 55300 81500 4
N 54300 81200 55300 81200 4
N 54300 81200 54300 81500 4
N 57100 81500 57200 81500 4
N 58100 81500 58600 81500 4
{
T 58800 81550 5 10 1 1 0 0 1
netname=PCLK
}
T 54300 81000 5 10 1 1 180 0 1
refdes=C4
T 54500 80800 5 10 1 1 180 0 1
value=0.1uF
T 56000 81800 9 10 1 0 0 0 1
2.048MHz
C 57200 81400 1 0 0 bf-resistor-1.sym
{
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refdes=R32
T 57200 81400 5 10 0 0 0 0 1
footprint=bf_0603
T 58000 81800 5 10 1 1 180 0 1
value=0
}
C 57600 81300 1 180 0 nc-left-1.sym
{
T 105515 80250 5 10 0 0 180 0 1
value=NoConnection
T 105800 79700 5 10 0 0 180 0 1
device=DRC_Directive
}
T 65900 81100 9 10 1 0 0 0 1
NOTE: C166 & C164 height restricted to 15mm. Lay over if u have to
C 58300 84100 1 270 0 EMBEDDEDcapacitor-d1.sym
[
P 58500 84100 58500 83900 1 0 0
{
T 58550 84000 5 8 0 1 270 0 1
pinnumber=1
T 58550 84000 5 8 0 0 270 0 1
pinseq=1
T 58500 84100 5 10 0 0 270 0 1
pinlabel=pin1
T 58500 84100 5 10 0 0 270 0 1
pintype=pas
}
P 58500 83200 58500 83400 1 0 0
{
T 58550 83400 5 8 0 1 270 0 1
pinnumber=2
T 58550 83400 5 8 0 0 270 0 1
pinseq=2
T 58500 83200 5 10 0 0 270 0 1
pintype=pas
T 58500 83200 5 10 0 0 270 0 1
pinlabel=pin2
}
L 58671 83700 58330 83700 3 0 0 0 -1 -1
L 58672 83600 58332 83600 3 0 0 0 -1 -1
L 58500 83400 58500 83600 3 0 0 0 -1 -1
L 58500 83700 58500 83900 3 0 0 0 -1 -1
T 58900 83800 5 10 0 0 270 0 1
device=CAPACITOR
T 58800 83900 8 10 0 1 270 0 1
refdes=C65
T 59100 83900 8 10 0 0 270 0 1
class=DISCRETE
T 59300 83600 8 10 0 0 270 0 1
numslots=0
T 59500 83800 8 10 0 0 270 0 1
footprint=d0603
]
{
T 58818 83923 5 10 1 1 0 0 1
refdes=C118
T 58812 83721 5 10 1 1 0 0 1
value=1uF
T 58344 83591 5 10 0 1 270 0 1
footprint=d1206
}
N 57300 84100 58500 84100 4
N 57300 83200 58500 83200 4
T 52900 74100 9 10 1 0 0 0 6
NOTE: If J5 loaded use a 
header with pins that project
at least 15mm above the top
surface of the PCB.  This is 
required to avoid fouling with
next 4fx in stack.
C 53000 85000 1 270 0 EMBEDDEDresistor-d.sym
[
P 53100 84100 53100 84250 1 0 0
{
T 53150 84200 5 8 0 1 270 0 1
pinnumber=2
T 53150 84200 5 8 0 0 270 0 1
pinseq=2
T 53150 84200 5 8 0 1 270 0 1
pintype=pas
T 53150 84200 5 8 0 0 270 0 1
pinlabel=2
}
P 53100 85000 53100 84848 1 0 0
{
T 53150 84900 5 8 0 1 270 0 1
pinnumber=1
T 53150 84900 5 8 0 0 270 0 1
pinseq=1
T 53150 84900 5 8 0 1 270 0 1
pintype=pas
T 53150 84900 5 8 0 0 270 0 1
pinlabel=1
}
B 53000 84250 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 53350 84600 5 10 0 0 270 0 1
device=RESISTOR
T 53300 84800 8 10 0 1 270 0 1
refdes=R66
T 53350 84600 5 10 0 0 270 0 1
footprint=d0603
T 53350 84600 5 10 0 0 270 0 1
numslots=0
]
{
T 52490 84710 5 10 1 1 0 0 1
refdes=R137
T 52532 84532 5 10 1 1 0 0 1
value=10k
T 53220 85013 5 10 0 1 270 0 1
footprint=d0603
}
C 52900 85000 1 0 0 EMBEDDED3.3V.sym
[
P 53100 85000 53100 85200 1 0 0
{
T 53150 85050 5 6 0 1 0 0 1
pinnumber=1
T 53150 85050 5 6 0 0 0 0 1
pinseq=1
}
L 52950 85200 53250 85200 3 0 0 0 -1 -1
T 52975 85250 9 8 1 0 0 0 1
+3.3V
T 53200 85000 8 8 0 0 0 0 1
net=+3.3V:1
]
N 53900 85000 53100 85000 4
N 53100 84100 53100 82800 4
N 54500 82900 55100 82900 4
{
T 54550 82950 5 10 1 1 0 0 1
netname=SDO
}
C 52800 77700 1 270 0 EMBEDDEDresistor-d.sym
[
P 52900 76800 52900 76950 1 0 0
{
T 52950 76900 5 8 0 1 270 0 1
pinnumber=2
T 52950 76900 5 8 0 0 270 0 1
pinseq=2
T 52950 76900 5 8 0 1 270 0 1
pintype=pas
T 52950 76900 5 8 0 0 270 0 1
pinlabel=2
}
P 52900 77700 52900 77548 1 0 0
{
T 52950 77600 5 8 0 1 270 0 1
pinnumber=1
T 52950 77600 5 8 0 0 270 0 1
pinseq=1
T 52950 77600 5 8 0 1 270 0 1
pintype=pas
T 52950 77600 5 8 0 0 270 0 1
pinlabel=1
}
B 52800 76950 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 53150 77300 5 10 0 0 270 0 1
device=RESISTOR
T 53100 77500 8 10 0 1 270 0 1
refdes=R66
T 53150 77300 5 10 0 0 270 0 1
footprint=d0603
T 53150 77300 5 10 0 0 270 0 1
numslots=0
]
{
T 53090 77410 5 10 1 1 0 0 1
refdes=R132
T 53132 77232 5 10 1 1 0 0 1
value=10k
T 53020 77713 5 10 0 1 270 0 1
footprint=d0603
}
C 53100 76800 1 180 0 bf-3.3V-plus-1.sym
C 53400 85000 1 270 0 EMBEDDEDresistor-d.sym
[
P 53500 84100 53500 84250 1 0 0
{
T 53550 84200 5 8 0 1 270 0 1
pinnumber=2
T 53550 84200 5 8 0 0 270 0 1
pinseq=2
T 53550 84200 5 8 0 1 270 0 1
pintype=pas
T 53550 84200 5 8 0 0 270 0 1
pinlabel=2
}
P 53500 85000 53500 84848 1 0 0
{
T 53550 84900 5 8 0 1 270 0 1
pinnumber=1
T 53550 84900 5 8 0 0 270 0 1
pinseq=1
T 53550 84900 5 8 0 1 270 0 1
pintype=pas
T 53550 84900 5 8 0 0 270 0 1
pinlabel=1
}
B 53400 84250 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 53750 84600 5 10 0 0 270 0 1
device=RESISTOR
T 53700 84800 8 10 0 1 270 0 1
refdes=R66
T 53750 84600 5 10 0 0 270 0 1
footprint=d0603
T 53750 84600 5 10 0 0 270 0 1
numslots=0
]
{
T 54090 84610 5 10 1 1 0 0 1
refdes=R131
T 54132 84432 5 10 1 1 0 0 1
value=10k
T 53620 85013 5 10 0 1 270 0 1
footprint=d0603
}
C 53800 85000 1 270 0 EMBEDDEDresistor-d.sym
[
P 53900 84100 53900 84250 1 0 0
{
T 53950 84200 5 8 0 1 270 0 1
pinnumber=2
T 53950 84200 5 8 0 0 270 0 1
pinseq=2
T 53950 84200 5 8 0 1 270 0 1
pintype=pas
T 53950 84200 5 8 0 0 270 0 1
pinlabel=2
}
P 53900 85000 53900 84848 1 0 0
{
T 53950 84900 5 8 0 1 270 0 1
pinnumber=1
T 53950 84900 5 8 0 0 270 0 1
pinseq=1
T 53950 84900 5 8 0 1 270 0 1
pintype=pas
T 53950 84900 5 8 0 0 270 0 1
pinlabel=1
}
B 53800 84250 200 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 54150 84600 5 10 0 0 270 0 1
device=RESISTOR
T 54100 84800 8 10 0 1 270 0 1
refdes=R66
T 54150 84600 5 10 0 0 270 0 1
footprint=d0603
T 54150 84600 5 10 0 0 270 0 1
numslots=0
]
{
T 53490 85110 5 10 1 1 0 0 1
refdes=R130
T 54032 85132 5 10 1 1 0 0 1
value=10k
T 54020 85013 5 10 0 1 270 0 1
footprint=d0603
}
N 53500 83900 53500 84100 4
N 53900 84100 53900 82200 4
T 50700 85400 9 10 1 0 0 0 4
Note nCSB actually connected to PF12
on Blackfin, PF2 label below is historical
allocation of this pin on STAMP SPORT
connector.