v 20060123 1
P 13000 10900 13000 11200 1 0 1
{
T 12950 10950 5 8 1 1 90 0 1
pinnumber=98
T 12950 10950 5 8 0 1 90 0 1
pintype=io
T 12950 10950 5 8 0 1 90 0 1
pinseq=98
T 13000 10800 9 8 1 1 90 6 1
pinlabel=DATA15
}
P 12800 10900 12800 11200 1 0 1
{
T 12750 10950 5 8 1 1 90 0 1
pinnumber=99
T 12750 10950 5 8 0 1 90 0 1
pinseq=99
T 12750 10950 5 8 0 1 90 0 1
pintype=io
T 12800 10800 9 8 1 1 90 6 1
pinlabel=DATA14
}
P 12600 10900 12600 11200 1 0 1
{
T 12550 10950 5 8 1 1 90 0 1
pinnumber=100
T 12550 10950 5 8 0 1 90 0 1
pinseq=100
T 12550 10950 5 8 0 1 90 0 1
pintype=io
T 12600 10800 9 8 1 1 90 6 1
pinlabel=DATA13
}
P 12400 10900 12400 11200 1 0 1
{
T 12350 10950 5 8 1 1 90 0 1
pinnumber=101
T 12350 10950 5 8 0 1 90 0 1
pinseq=101
T 12350 10950 5 8 0 1 90 0 1
pintype=io
T 12400 10800 9 8 1 1 90 6 1
pinlabel=DATA12
}
P 12200 10900 12200 11200 1 0 1
{
T 12150 10950 5 8 1 1 90 0 1
pinnumber=102
T 12150 10950 5 8 0 1 90 0 1
pinseq=102
T 12150 10950 5 8 0 1 90 0 1
pintype=io
T 12200 10800 9 8 1 1 90 6 1
pinlabel=DATA11
}
P 12000 10900 12000 11200 1 0 1
{
T 11950 10950 5 8 1 1 90 0 1
pinnumber=103
T 11950 10950 5 8 0 1 90 0 1
pinseq=103
T 11950 10950 5 8 0 1 90 0 1
pintype=io
T 12000 10800 9 8 1 1 90 6 1
pinlabel=DATA10
}
P 11800 10900 11800 11200 1 0 1
{
T 11750 10950 5 8 1 1 90 0 1
pinnumber=104
T 11750 10950 5 8 0 1 90 0 1
pinseq=104
T 11750 10950 5 8 0 1 90 0 1
pintype=io
T 11800 10800 9 8 1 1 90 6 1
pinlabel=DATA9
}
P 11600 10900 11600 11200 1 0 1
{
T 11550 10950 5 8 1 1 90 0 1
pinnumber=105
T 11550 10950 5 8 0 1 90 0 1
pinseq=105
T 11550 10950 5 8 0 1 90 0 1
pintype=io
T 11600 10800 9 8 1 1 90 6 1
pinlabel=DATA8
}
P 11400 10900 11400 11200 1 0 1
{
T 11350 10950 5 8 1 1 90 0 1
pinnumber=108
T 11350 10950 5 8 0 1 90 0 1
pinseq=108
T 11350 10950 5 8 0 1 90 0 1
pintype=io
T 11400 10800 9 8 1 1 90 6 1
pinlabel=DATA7
}
P 11200 10900 11200 11200 1 0 1
{
T 11150 10950 5 8 1 1 90 0 1
pinnumber=109
T 11150 10950 5 8 0 1 90 0 1
pinseq=109
T 11150 10950 5 8 0 1 90 0 1
pintype=io
T 11200 10800 9 8 1 1 90 6 1
pinlabel=DATA6
}
P 11000 10900 11000 11200 1 0 1
{
T 10950 10950 5 8 1 1 90 0 1
pinnumber=110
T 10950 10950 5 8 0 1 90 0 1
pinseq=110
T 10950 10950 5 8 0 1 90 0 1
pintype=io
T 11000 10800 9 8 1 1 90 6 1
pinlabel=DATA5
}
P 10800 10900 10800 11200 1 0 1
{
T 10750 10950 5 8 1 1 90 0 1
pinnumber=112
T 10750 10950 5 8 0 1 90 0 1
pinseq=112
T 10750 10950 5 8 0 1 90 0 1
pintype=io
T 10800 10800 9 8 1 1 90 6 1
pinlabel=DATA4
}
P 10600 10900 10600 11200 1 0 1
{
T 10550 10950 5 8 1 1 90 0 1
pinnumber=113
T 10550 10950 5 8 0 1 90 0 1
pinseq=113
T 10550 10950 5 8 0 1 90 0 1
pintype=io
T 10600 10800 9 8 1 1 90 6 1
pinlabel=DATA3
}
P 10400 10900 10400 11200 1 0 1
{
T 10350 10950 5 8 1 1 90 0 1
pinnumber=114
T 10350 10950 5 8 0 1 90 0 1
pinseq=114
T 10350 10950 5 8 0 1 90 0 1
pintype=io
T 10400 10800 9 8 1 1 90 6 1
pinlabel=DATA2
}
P 10200 10900 10200 11200 1 0 1
{
T 10150 10950 5 8 1 1 90 0 1
pinnumber=115
T 10150 10950 5 8 0 1 90 0 1
pinseq=115
T 10150 10950 5 8 0 1 90 0 1
pintype=io
T 10200 10800 9 8 1 1 90 6 1
pinlabel=DATA1
}
P 10000 10900 10000 11200 1 0 1
{
T 9950 10950 5 8 1 1 90 0 1
pinnumber=116
T 9950 10950 5 8 0 1 90 0 1
pinseq=116
T 9950 10950 5 8 0 1 90 0 1
pintype=io
T 10000 10800 9 8 1 1 90 6 1
pinlabel=DATA0
}
P 300 9500 100 9500 1 0 1
{
T 350 9550 5 8 1 1 0 6 1
pinnumber=119
T 350 9550 5 8 0 1 0 6 1
pinseq=119
T 350 9550 5 8 0 1 0 6 1
pintype=out
T 500 9500 9 8 1 1 0 0 1
pinlabel=BG (Bus Grant)
}
V 350 9500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 300 9300 100 9300 1 0 1
{
T 350 9350 5 8 1 1 0 6 1
pinnumber=120
T 350 9350 5 8 0 1 0 6 1
pinseq=120
T 350 9350 5 8 0 1 0 6 1
pintype=out
T 500 9300 9 8 1 1 0 0 1
pinlabel=BGH (Bus Grant Hang)
}
P 4200 10900 4200 11200 1 0 1
{
T 4150 10950 5 8 1 1 90 0 1
pinnumber=121
T 4150 10950 5 8 0 1 90 0 1
pinseq=121
T 4150 10950 5 8 0 1 90 0 1
pintype=out
T 4200 10800 9 8 1 1 90 6 1
pinlabel=ADDR19
}
P 4000 10900 4000 11200 1 0 1
{
T 3950 10950 5 8 1 1 90 0 1
pinnumber=122
T 3950 10950 5 8 0 1 90 0 1
pinseq=122
T 3950 10950 5 8 0 1 90 0 1
pintype=out
T 4000 10800 9 8 1 1 90 6 1
pinlabel=ADDR18
}
P 3800 10900 3800 11200 1 0 1
{
T 3750 10950 5 8 1 1 90 0 1
pinnumber=123
T 3750 10950 5 8 0 1 90 0 1
pinseq=123
T 3750 10950 5 8 0 1 90 0 1
pintype=out
T 3800 10800 9 8 1 1 90 6 1
pinlabel=ADDR17
}
P 3600 10900 3600 11200 1 0 1
{
T 3550 10950 5 8 1 1 90 0 1
pinnumber=124
T 3550 10950 5 8 0 1 90 0 1
pinseq=124
T 3550 10950 5 8 0 1 90 0 1
pintype=out
T 3600 10800 9 8 1 1 90 6 1
pinlabel=ADDR16
}
P 3400 10900 3400 11200 1 0 1
{
T 3350 10950 5 8 1 1 90 0 1
pinnumber=125
T 3350 10950 5 8 0 1 90 0 1
pinseq=125
T 3350 10950 5 8 0 1 90 0 1
pintype=out
T 3400 10800 9 8 1 1 90 6 1
pinlabel=ADDR15
}
P 3200 10900 3200 11200 1 0 1
{
T 3150 10950 5 8 1 1 90 0 1
pinnumber=126
T 3150 10950 5 8 0 1 90 0 1
pinseq=126
T 3150 10950 5 8 0 1 90 0 1
pintype=out
T 3200 10800 9 8 1 1 90 6 1
pinlabel=ADDR14
}
P 3000 10900 3000 11200 1 0 1
{
T 2950 10950 5 8 1 1 90 0 1
pinnumber=127
T 2950 10950 5 8 0 1 90 0 1
pinseq=127
T 2950 10950 5 8 0 1 90 0 1
pintype=out
T 3000 10800 9 8 1 1 90 6 1
pinlabel=ADDR13
}
P 2800 10900 2800 11200 1 0 1
{
T 2750 10950 5 8 1 1 90 0 1
pinnumber=135
T 2750 10950 5 8 0 1 90 0 1
pintype=out
T 2750 10950 5 8 0 1 90 0 1
pinseq=135
T 2800 10800 9 8 1 1 90 6 1
pinlabel=ADDR12
}
P 2600 10900 2600 11200 1 0 1
{
T 2550 10950 5 8 1 1 90 0 1
pinnumber=136
T 2550 10950 5 8 0 1 90 0 1
pinseq=136
T 2550 10950 5 8 0 1 90 0 1
pintype=out
T 2600 10800 9 8 1 1 90 6 1
pinlabel=ADDR11
}
P 2400 10900 2400 11200 1 0 1
{
T 2350 10950 5 8 1 1 90 0 1
pinnumber=137
T 2350 10950 5 8 0 1 90 0 1
pinseq=137
T 2350 10950 5 8 0 1 90 0 1
pintype=out
T 2400 10800 9 8 1 1 90 6 1
pinlabel=ADDR10
}
P 2200 10900 2200 11200 1 0 1
{
T 2150 10950 5 8 1 1 90 0 1
pinnumber=138
T 2150 10950 5 8 0 1 90 0 1
pinseq=138
T 2150 10950 5 8 0 1 90 0 1
pintype=out
T 2200 10800 9 8 1 1 90 6 1
pinlabel=ADDR9
}
P 2000 10900 2000 11200 1 0 1
{
T 1950 10950 5 8 1 1 90 0 1
pinnumber=139
T 1950 10950 5 8 0 1 90 0 1
pinseq=139
T 1950 10950 5 8 0 1 90 0 1
pintype=out
T 2000 10800 9 8 1 1 90 6 1
pinlabel=ADDR8
}
P 1800 10900 1800 11200 1 0 1
{
T 1750 10950 5 8 1 1 90 0 1
pinnumber=140
T 1750 10950 5 8 0 1 90 0 1
pinseq=140
T 1750 10950 5 8 0 1 90 0 1
pintype=out
T 1800 10800 9 8 1 1 90 6 1
pinlabel=ADDR7
}
P 1600 10900 1600 11200 1 0 1
{
T 1550 10950 5 8 1 1 90 0 1
pinnumber=141
T 1550 10950 5 8 0 1 90 0 1
pinseq=141
T 1550 10950 5 8 0 1 90 0 1
pintype=out
T 1600 10800 9 8 1 1 90 6 1
pinlabel=ADDR6
}
P 1400 10900 1400 11200 1 0 1
{
T 1350 10950 5 8 1 1 90 0 1
pinnumber=142
T 1350 10950 5 8 0 1 90 0 1
pinseq=142
T 1350 10950 5 8 0 1 90 0 1
pintype=out
T 1400 10800 9 8 1 1 90 6 1
pinlabel=ADDR5
}
P 1200 10900 1200 11200 1 0 1
{
T 1150 10950 5 8 1 1 90 0 1
pinnumber=146
T 1150 10950 5 8 0 1 90 0 1
pinseq=146
T 1150 10950 5 8 0 1 90 0 1
pintype=out
T 1200 10800 9 8 1 1 90 6 1
pinlabel=ADDR4
}
P 1000 10900 1000 11200 1 0 1
{
T 950 10950 5 8 1 1 90 0 1
pinnumber=147
T 950 10950 5 8 0 1 90 0 1
pinseq=147
T 950 10950 5 8 0 1 90 0 1
pintype=out
T 1000 10800 9 8 1 1 90 6 1
pinlabel=ADDR3
}
P 800 10900 800 11200 1 0 1
{
T 750 10950 5 8 1 1 90 0 1
pinnumber=148
T 750 10950 5 8 0 1 90 0 1
pintype=out
T 750 10950 5 8 0 1 90 0 1
pinseq=148
T 800 10800 9 8 1 1 90 6 1
pinlabel=ADDR2
}
P 600 10900 600 11200 1 0 1
{
T 550 10950 5 8 1 1 90 0 1
pinnumber=149
T 550 10950 5 8 0 1 90 0 1
pinseq=149
T 550 10950 5 8 0 1 90 0 1
pintype=out
T 600 10800 9 8 1 1 90 6 1
pinlabel=ADDR1
}
P 300 8900 100 8900 1 0 1
{
T 350 8950 5 8 1 1 0 6 1
pinnumber=150
T 350 8950 5 8 0 1 0 6 1
pinseq=150
T 350 8950 5 8 0 1 0 6 1
pintype=out
T 500 8900 9 8 1 1 0 0 1
pinlabel=ABE1/SDQM1 (Byte Enable 1/Data Mask 1)
}
P 300 9100 100 9100 1 0 1
{
T 350 9150 5 8 1 1 0 6 1
pinnumber=151
T 350 9150 5 8 0 1 0 6 1
pinseq=151
T 350 9150 5 8 0 1 0 6 1
pintype=out
T 500 9100 9 8 1 1 0 0 1
pinlabel=ABE0/SDQM0 (Byte Enable 0/Data Mask 0)
}
P 300 7200 100 7200 1 0 1
{
T 350 7250 5 8 1 1 0 6 1
pinnumber=152
T 350 7250 5 8 0 1 0 6 1
pinseq=152
T 350 7250 5 8 0 1 0 6 1
pintype=out
T 500 7200 9 8 1 1 0 0 1
pinlabel=AWE (Write Enable)
}
P 300 7400 100 7400 1 0 1
{
T 350 7450 5 8 1 1 0 6 1
pinnumber=153
T 350 7450 5 8 0 1 0 6 1
pinseq=153
T 350 7450 5 8 0 1 0 6 1
pintype=out
T 500 7400 9 8 1 1 0 0 1
pinlabel=ARE (Read Enable)
}
P 300 7600 100 7600 1 0 1
{
T 350 7650 5 8 1 1 0 6 1
pinnumber=154
T 350 7650 5 8 0 1 0 6 1
pinseq=154
T 350 7650 5 8 0 1 0 6 1
pintype=out
T 500 7600 9 8 1 1 0 0 1
pinlabel=AOE (Output Enable)
}
P 300 8000 100 8000 1 0 1
{
T 350 8050 5 8 1 1 0 6 1
pinnumber=158
T 350 8050 5 8 0 1 0 6 1
pinseq=158
T 350 8050 5 8 0 1 0 6 1
pintype=out
T 500 8000 9 8 1 1 0 0 1
pinlabel=AMS3 (Bank Select 3)
}
P 300 8200 100 8200 1 0 1
{
T 350 8250 5 8 1 1 0 6 1
pinnumber=159
T 350 8250 5 8 0 1 0 6 1
pinseq=159
T 350 8250 5 8 0 1 0 6 1
pintype=out
T 500 8200 9 8 1 1 0 0 1
pinlabel=AMS2 (Bank Select 2)
}
P 300 8400 100 8400 1 0 1
{
T 350 8450 5 8 1 1 0 6 1
pinnumber=160
T 350 8450 5 8 0 1 0 6 1
pinseq=160
T 350 8450 5 8 0 1 0 6 1
pintype=out
T 500 8400 9 8 1 1 0 0 1
pinlabel=AMS1 (Bank Select 1)
}
P 300 8600 100 8600 1 0 1
{
T 350 8650 5 8 1 1 0 6 1
pinnumber=161
T 350 8650 5 8 0 1 0 6 1
pinseq=161
T 350 8650 5 8 0 1 0 6 1
pintype=out
T 500 8600 9 8 1 1 0 0 1
pinlabel=AMS0 (Bank Select 0)
}
P 400 7800 100 7800 1 0 1
{
T 350 7850 5 8 1 1 0 6 1
pinnumber=162
T 350 7850 5 8 0 1 0 6 1
pinseq=162
T 350 7850 5 8 0 1 0 6 1
pintype=in
T 500 7800 9 8 1 1 0 0 1
pinlabel=ARDY (Hardware Ready Control)
}
P 300 9700 100 9700 1 0 1
{
T 350 9750 5 8 1 1 0 6 1
pinnumber=163
T 350 9750 5 8 0 1 0 6 1
pinseq=163
T 350 9750 5 8 0 1 0 6 1
pintype=in
T 500 9700 9 8 1 1 0 0 1
pinlabel=BR (Bus Request)
}
P 13100 8900 13400 8900 1 0 1
{
T 13150 8950 5 8 1 1 0 0 1
pinnumber=164
T 13150 8950 5 8 0 1 0 0 1
pinseq=164
T 13150 8950 5 8 0 1 0 0 1
pintype=out
T 13000 8900 9 8 1 1 0 6 1
pinlabel=(A10 Pin) SA10
}
P 13200 9500 13400 9500 1 0 1
{
T 13150 9550 5 8 1 1 0 0 1
pinnumber=165
T 13150 9550 5 8 0 1 0 0 1
pinseq=165
T 13150 9550 5 8 0 1 0 0 1
pintype=out
T 13000 9500 9 8 1 1 0 6 1
pinlabel=(Write Enable) SWE
}
P 13200 9700 13400 9700 1 0 1
{
T 13150 9750 5 8 1 1 0 0 1
pinnumber=166
T 13150 9750 5 8 0 1 0 0 1
pinseq=166
T 13150 9750 5 8 0 1 0 0 1
pintype=out
T 13000 9700 9 8 1 1 0 6 1
pinlabel=(Column Address Strobe) SCAS
}
P 13200 9900 13400 9900 1 0 1
{
T 13150 9950 5 8 1 1 0 0 1
pinnumber=167
T 13150 9950 5 8 0 1 0 0 1
pinseq=167
T 13150 9950 5 8 0 1 0 0 1
pintype=out
T 13000 9900 9 8 1 1 0 6 1
pinlabel=(Row Address Strobe) SRAS
}
P 13100 9100 13400 9100 1 0 1
{
T 13150 9150 5 8 1 1 0 0 1
pinnumber=169
T 13150 9150 5 8 0 1 0 0 1
pinseq=169
T 13150 9150 5 8 0 1 0 0 1
pintype=out
T 13000 9100 9 8 1 1 0 6 1
pinlabel=(Clock Output) CLKOUT
}
P 13200 8700 13400 8700 1 0 1
{
T 13150 8750 5 8 1 1 0 0 1
pinnumber=172
T 13150 8750 5 8 0 1 0 0 1
pinseq=172
T 13150 8750 5 8 0 1 0 0 1
pintype=out
T 13000 8700 9 8 1 1 0 6 1
pinlabel=(Bank Select) SMS
}
P 13100 9300 13400 9300 1 0 1
{
T 13150 9350 5 8 1 1 0 0 1
pinnumber=173
T 13150 9350 5 8 0 1 0 0 1
pinseq=173
T 13150 9350 5 8 0 1 0 0 1
pintype=out
T 13000 9300 9 8 1 1 0 6 1
pinlabel=(Clock Enable) SCKE
}
L 550 9025 900 9025 3 0 0 0 -1 -1
L 525 9225 950 9225 3 0 0 0 -1 -1
L 506 7334 831 7334 3 0 0 0 -1 -1
L 550 7525 825 7525 3 0 0 0 -1 -1
L 550 7725 850 7725 3 0 0 0 -1 -1
L 525 8125 925 8125 3 0 0 0 -1 -1
L 525 8325 925 8325 3 0 0 0 -1 -1
L 525 8525 900 8525 3 0 0 0 -1 -1
L 525 8725 925 8725 3 0 0 0 -1 -1
L 13000 9625 12675 9625 3 0 0 0 -1 -1
L 13000 9825 12600 9825 3 0 0 0 -1 -1
L 13000 10025 12600 10025 3 0 0 0 -1 -1
L 13000 8825 12700 8825 3 0 0 0 -1 -1
L 700 9625 475 9625 3 0 0 0 -1 -1
L 700 9825 475 9825 3 0 0 0 -1 -1
L 500 9425 825 9425 3 0 0 0 -1 -1
T 6204 10704 5 8 1 1 0 0 1
refdes=U?
T 6204 10357 5 8 0 1 0 0 1
device=ADSP-BF532
T 6204 10504 5 8 1 1 0 0 1
value=ADSP-BF532
T 6204 10304 5 8 1 1 0 0 1
footprint=DLQFP-24x24-176
P 400 1300 100 1300 1 0 1
{
T 350 1350 5 8 1 1 0 6 1
pinnumber=4
T 350 1350 5 8 0 1 0 6 1
pinseq=4
T 350 1350 5 8 0 1 0 6 1
pintype=pas
T 500 1300 9 8 1 1 0 0 1
pinlabel=VROUT1 (External FET Drive 1)
}
P 400 1500 100 1500 1 0 1
{
T 350 1550 5 8 1 1 0 6 1
pinnumber=5
T 350 1550 5 8 0 1 0 6 1
pinseq=5
T 350 1550 5 8 0 1 0 6 1
pintype=pas
T 500 1500 9 8 1 1 0 0 1
pinlabel=VROUT0 (External FET Drive 0)
}
P 13100 1500 13400 1500 1 0 1
{
T 13150 1550 5 8 1 1 0 0 1
pinnumber=10
T 13150 1550 5 8 0 1 0 0 1
pinseq=10
T 13150 1550 5 8 0 1 0 0 1
pintype=in
T 13000 1500 9 8 1 1 0 6 1
pinlabel=CLKIN (Clock/Crystal Input)
}
P 13100 1300 13400 1300 1 0 1
{
T 13150 1350 5 8 1 1 0 0 1
pinnumber=11
T 13150 1350 5 8 0 1 0 0 1
pinseq=11
T 13150 1350 5 8 0 1 0 0 1
pintype=out
T 13000 1300 9 8 1 1 0 6 1
pinlabel=XTAL (Crystal Output)
}
P 13200 2400 13400 2400 1 0 1
{
T 13150 2450 5 8 1 1 0 0 1
pinnumber=13
T 13150 2450 5 8 0 1 0 0 1
pinseq=13
T 13150 2450 5 8 0 1 0 0 1
pintype=in
T 13000 2400 9 8 1 1 0 6 1
pinlabel=RESET
}
P 13100 2200 13400 2200 1 0 1
{
T 13150 2250 5 8 1 1 0 0 1
pinnumber=14
T 13150 2250 5 8 0 1 0 0 1
pinseq=14
T 13150 2250 5 8 0 1 0 0 1
pintype=in
T 13000 2200 9 8 1 1 0 6 1
pinlabel=NMI
}
P 13100 1900 13400 1900 1 0 1
{
T 13150 1950 5 8 1 1 0 0 1
pinnumber=16
T 13150 1950 5 8 0 1 0 0 1
pinseq=16
T 13150 1950 5 8 0 1 0 0 1
pintype=out
T 13000 1900 9 8 1 1 0 6 1
pinlabel=RTXO (RTC Crystal Output)
}
P 13100 1700 13400 1700 1 0 1
{
T 13150 1750 5 8 1 1 0 0 1
pinnumber=17
T 13150 1750 5 8 0 1 0 0 1
pinseq=17
T 13150 1750 5 8 0 1 0 0 1
pintype=in
T 13000 1700 9 8 1 1 0 6 1
pinlabel=RTXI (RTC Crystal Input)
}
P 400 3200 100 3200 1 0 1
{
T 350 3250 5 8 1 1 0 6 1
pinnumber=81
T 350 3250 5 8 0 1 0 6 1
pinseq=81
T 350 3250 5 8 0 1 0 6 1
pintype=out
T 500 3200 9 8 1 1 0 0 1
pinlabel=TX (UART Transmit)
}
P 400 3400 100 3400 1 0 1
{
T 350 3450 5 8 1 1 0 6 1
pinnumber=82
T 350 3450 5 8 0 1 0 6 1
pinseq=82
T 350 3450 5 8 0 1 0 6 1
pintype=in
T 500 3400 9 8 1 1 0 0 1
pinlabel=RX (UART Receive)
}
P 13200 4100 13400 4100 1 0 1
{
T 13150 4150 5 8 1 1 0 0 1
pinnumber=83
T 13150 4150 5 8 0 1 0 0 1
pinseq=83
T 13150 4150 5 8 0 1 0 0 1
pintype=out
T 13000 4100 9 8 1 1 0 6 1
pinlabel=(Emulation Output) EMU
}
P 13200 3500 13400 3500 1 0 1
{
T 13150 3550 5 8 1 1 0 0 1
pinnumber=84
T 13150 4150 5 8 0 1 0 0 1
pinseq=84
T 13150 4150 5 8 0 1 0 0 1
pintype=in
T 13000 3500 9 8 1 1 0 6 1
pinlabel=(JTAG Reset) TRST
}
P 13100 3900 13400 3900 1 0 1
{
T 13150 3950 5 8 1 1 0 0 1
pinnumber=85
T 13150 3950 5 8 0 1 0 0 1
pinseq=85
T 13150 3950 5 8 0 1 0 0 1
pintype=in
T 13000 3900 9 8 1 1 0 6 1
pinlabel=(JTAG Mode Select) TMS
}
P 13100 3300 13400 3300 1 0 1
{
T 13150 3350 5 8 1 1 0 0 1
pinnumber=86
T 13150 3350 5 8 0 1 0 0 1
pinseq=86
T 13150 3350 5 8 0 1 0 0 1
pintype=in
T 13000 3300 9 8 1 1 0 6 1
pinlabel=(JTAG Serial Data In) TDI
}
P 13100 3100 13400 3100 1 0 1
{
T 13150 3150 5 8 1 1 0 0 1
pinnumber=87
T 13150 3150 5 8 0 1 0 0 1
pinseq=87
T 13150 3150 5 8 0 1 0 0 1
pintype=out
T 13000 3100 9 8 1 1 0 6 1
pinlabel=(JTAG Serial Data Out) TDO
}
P 13100 3700 13400 3700 1 0 1
{
T 13150 3750 5 8 1 1 0 0 1
pinnumber=94
T 13150 3750 5 8 0 1 0 0 1
pinseq=94
T 13150 3750 5 8 0 1 0 0 1
pintype=in
T 13000 3700 9 8 1 1 0 6 1
pinlabel=(JTAG Serial Data Clock) TCK
}
P 13100 2600 13400 2600 1 0 1
{
T 13150 2650 5 8 1 1 0 0 1
pinnumber=95
T 13150 2650 5 8 0 1 0 0 1
pinseq=95
T 13150 2650 5 8 0 1 0 0 1
pintype=in
T 13000 2600 9 8 1 1 0 6 1
pinlabel=(Boot Mode Strap 1) BMODE1
}
P 13100 2800 13400 2800 1 0 1
{
T 13150 2850 5 8 1 1 0 0 1
pinnumber=96
T 13150 2850 5 8 0 1 0 0 1
pinseq=96
T 13150 2850 5 8 0 1 0 0 1
pintype=in
T 13000 2800 9 8 1 1 0 6 1
pinlabel=(Boot Mode Strap 0) BMODE0
}
L 13025 2525 12475 2525 3 0 0 0 -1 -1
L 12650 4225 12975 4225 3 0 0 0 -1 -1
L 12600 3625 13000 3625 3 0 0 0 -1 -1
P 5800 400 5800 100 1 0 1
{
T 5750 350 5 8 1 1 90 6 1
pinnumber=1
T 5750 350 5 8 0 1 90 6 1
pinseq=1
T 5750 350 5 8 0 1 90 6 1
pintype=pwr
T 5800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 6000 400 6000 100 1 0 1
{
T 5950 350 5 8 1 1 90 6 1
pinnumber=2
T 5950 350 5 8 0 1 90 6 1
pinseq=2
T 5950 350 5 8 0 1 90 6 1
pintype=pwr
T 6000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 6200 400 6200 100 1 0 1
{
T 6150 350 5 8 1 1 90 6 1
pinnumber=3
T 6150 350 5 8 0 1 90 6 1
pinseq=3
T 6150 350 5 8 0 1 90 6 1
pintype=pwr
T 6200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 600 400 600 100 1 0 1
{
T 550 350 5 8 1 1 90 6 1
pinnumber=6
T 550 350 5 8 0 1 90 6 1
pinseq=6
T 550 350 5 8 0 1 90 6 1
pintype=pwr
T 600 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 6400 400 6400 100 1 0 1
{
T 6350 350 5 8 1 1 90 6 1
pinnumber=7
T 6350 350 5 8 0 1 90 6 1
pinseq=7
T 6350 350 5 8 0 1 90 6 1
pintype=pwr
T 6400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 6600 400 6600 100 1 0 1
{
T 6550 350 5 8 1 1 90 6 1
pinnumber=8
T 6550 350 5 8 0 1 90 6 1
pinseq=8
T 6550 350 5 8 0 1 90 6 1
pintype=pwr
T 6600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 6800 400 6800 100 1 0 1
{
T 6750 350 5 8 1 1 90 6 1
pinnumber=9
T 6750 350 5 8 0 1 90 6 1
pinseq=9
T 6750 350 5 8 0 1 90 6 1
pintype=pwr
T 6800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 800 400 800 100 1 0 1
{
T 750 350 5 8 1 1 90 6 1
pinnumber=12
T 750 350 5 8 0 1 90 6 1
pinseq=12
T 750 350 5 8 0 1 90 6 1
pintype=pwr
T 800 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 7000 400 7000 100 1 0 1
{
T 6950 350 5 8 1 1 90 6 1
pinnumber=15
T 6950 350 5 8 0 1 90 6 1
pinseq=15
T 6950 350 5 8 0 1 90 6 1
pintype=pwr
T 7000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 5400 400 5400 100 1 0 1
{
T 5350 350 5 8 1 1 90 6 1
pinnumber=18
T 5350 350 5 8 0 1 90 6 1
pinseq=18
T 5350 350 5 8 0 1 90 6 1
pintype=pwr
T 5400 500 9 8 1 1 90 0 1
pinlabel=VDDRTC
}
P 7200 400 7200 100 1 0 1
{
T 7150 350 5 8 1 1 90 6 1
pinnumber=19
T 7150 350 5 8 0 1 90 6 1
pinseq=19
T 7150 350 5 8 0 1 90 6 1
pintype=pwr
T 7200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 1000 400 1000 100 1 0 1
{
T 950 350 5 8 1 1 90 6 1
pinnumber=20
T 950 350 5 8 0 1 90 6 1
pinseq=20
T 950 350 5 8 0 1 90 6 1
pintype=pwr
T 1000 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 3600 400 3600 100 1 0 1
{
T 3550 350 5 8 1 1 90 6 1
pinnumber=25
T 3550 350 5 8 0 1 90 6 1
pinseq=25
T 3550 350 5 8 0 1 90 6 1
pintype=pwr
T 3600 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 7400 400 7400 100 1 0 1
{
T 7350 350 5 8 1 1 90 6 1
pinnumber=30
T 7350 350 5 8 0 1 90 6 1
pinseq=30
T 7350 350 5 8 0 1 90 6 1
pintype=pwr
T 7400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 1200 400 1200 100 1 0 1
{
T 1150 350 5 8 1 1 90 6 1
pinnumber=31
T 1150 350 5 8 0 1 90 6 1
pinseq=31
T 1150 350 5 8 0 1 90 6 1
pintype=pwr
T 1200 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 7600 400 7600 100 1 0 1
{
T 7550 350 5 8 1 1 90 6 1
pinnumber=39
T 7550 350 5 8 0 1 90 6 1
pinseq=39
T 7550 350 5 8 0 1 90 6 1
pintype=pwr
T 7600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 7800 400 7800 100 1 0 1
{
T 7750 350 5 8 1 1 90 6 1
pinnumber=40
T 7750 350 5 8 0 1 90 6 1
pinseq=40
T 7750 350 5 8 0 1 90 6 1
pintype=pwr
T 7800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 8000 400 8000 100 1 0 1
{
T 7950 350 5 8 1 1 90 6 1
pinnumber=41
T 7950 350 5 8 0 1 90 6 1
pinseq=41
T 7950 350 5 8 0 1 90 6 1
pintype=pwr
T 8000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 8200 400 8200 100 1 0 1
{
T 8150 350 5 8 1 1 90 6 1
pinnumber=42
T 8150 350 5 8 0 1 90 6 1
pinseq=42
T 8150 350 5 8 0 1 90 6 1
pintype=pwr
T 8200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 8400 400 8400 100 1 0 1
{
T 8350 350 5 8 1 1 90 6 1
pinnumber=43
T 8350 350 5 8 0 1 90 6 1
pinseq=43
T 8350 350 5 8 0 1 90 6 1
pintype=pwr
T 8400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 8600 400 8600 100 1 0 1
{
T 8550 350 5 8 1 1 90 6 1
pinnumber=44
T 8550 350 5 8 0 1 90 6 1
pinseq=44
T 8550 350 5 8 0 1 90 6 1
pintype=pwr
T 8600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 1400 400 1400 100 1 0 1
{
T 1350 350 5 8 1 1 90 6 1
pinnumber=45
T 1350 350 5 8 0 1 90 6 1
pinseq=45
T 1350 350 5 8 0 1 90 6 1
pintype=pwr
T 1400 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 3800 400 3800 100 1 0 1
{
T 3750 350 5 8 1 1 90 6 1
pinnumber=52
T 3750 350 5 8 0 1 90 6 1
pinseq=52
T 3750 350 5 8 0 1 90 6 1
pintype=pwr
T 3800 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 8800 400 8800 100 1 0 1
{
T 8750 350 5 8 1 1 90 6 1
pinnumber=56
T 8750 350 5 8 0 1 90 6 1
pinseq=56
T 8750 350 5 8 0 1 90 6 1
pintype=pwr
T 8800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 1600 400 1600 100 1 0 1
{
T 1550 350 5 8 1 1 90 6 1
pinnumber=57
T 1550 350 5 8 0 1 90 6 1
pinseq=57
T 1550 350 5 8 0 1 90 6 1
pintype=pwr
T 1600 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 4000 400 4000 100 1 0 1
{
T 3950 350 5 8 1 1 90 6 1
pinnumber=66
T 3950 350 5 8 0 1 90 6 1
pinseq=66
T 3950 350 5 8 0 1 90 6 1
pintype=pwr
T 4000 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 9000 400 9000 100 1 0 1
{
T 8950 350 5 8 1 1 90 6 1
pinnumber=70
T 8950 350 5 8 0 1 90 6 1
pinseq=70
T 8950 350 5 8 0 1 90 6 1
pintype=pwr
T 9000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 1800 400 1800 100 1 0 1
{
T 1750 350 5 8 1 1 90 6 1
pinnumber=71
T 1750 350 5 8 0 1 90 6 1
pinseq=71
T 1750 350 5 8 0 1 90 6 1
pintype=pwr
T 1800 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 4200 400 4200 100 1 0 1
{
T 4150 350 5 8 1 1 90 6 1
pinnumber=80
T 4150 350 5 8 0 1 90 6 1
pinseq=80
T 4150 350 5 8 0 1 90 6 1
pintype=pwr
T 4200 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 9200 400 9200 100 1 0 1
{
T 9150 350 5 8 1 1 90 6 1
pinnumber=88
T 9150 350 5 8 0 1 90 6 1
pinseq=88
T 9150 350 5 8 0 1 90 6 1
pintype=pwr
T 9200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 9400 400 9400 100 1 0 1
{
T 9350 350 5 8 1 1 90 6 1
pinnumber=89
T 9350 350 5 8 0 1 90 6 1
pinseq=89
T 9350 350 5 8 0 1 90 6 1
pintype=pwr
T 9400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 9600 400 9600 100 1 0 1
{
T 9550 350 5 8 1 1 90 6 1
pinnumber=90
T 9550 350 5 8 0 1 90 6 1
pinseq=90
T 9550 350 5 8 0 1 90 6 1
pintype=pwr
T 9600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 9800 400 9800 100 1 0 1
{
T 9750 350 5 8 1 1 90 6 1
pinnumber=91
T 9750 350 5 8 0 1 90 6 1
pinseq=91
T 9750 350 5 8 0 1 90 6 1
pintype=pwr
T 9800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 10000 400 10000 100 1 0 1
{
T 9950 350 5 8 1 1 90 6 1
pinnumber=92
T 9950 350 5 8 0 1 90 6 1
pinseq=92
T 9950 350 5 8 0 1 90 6 1
pintype=pwr
T 10000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 2000 400 2000 100 1 0 1
{
T 1950 350 5 8 1 1 90 6 1
pinnumber=93
T 1950 350 5 8 0 1 90 6 1
pinseq=93
T 1950 350 5 8 0 1 90 6 1
pintype=pwr
T 2000 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 10200 400 10200 100 1 0 1
{
T 10150 350 5 8 1 1 90 6 1
pinnumber=97
T 10150 350 5 8 0 1 90 6 1
pinseq=97
T 10150 350 5 8 0 1 90 6 1
pintype=pwr
T 10200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 10400 400 10400 100 1 0 1
{
T 10350 350 5 8 1 1 90 6 1
pinnumber=106
T 10350 350 5 8 0 1 90 6 1
pinseq=106
T 10350 350 5 8 0 1 90 6 1
pintype=pwr
T 10400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 2200 400 2200 100 1 0 1
{
T 2150 350 5 8 1 1 90 6 1
pinnumber=107
T 2150 350 5 8 0 1 90 6 1
pinseq=107
T 2150 350 5 8 0 1 90 6 1
pintype=pwr
T 2200 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 4400 400 4400 100 1 0 1
{
T 4350 350 5 8 1 1 90 6 1
pinnumber=111
T 4350 350 5 8 0 1 90 6 1
pinseq=111
T 4350 350 5 8 0 1 90 6 1
pintype=pwr
T 4400 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 10600 400 10600 100 1 0 1
{
T 10550 350 5 8 1 1 90 6 1
pinnumber=117
T 10550 350 5 8 0 1 90 6 1
pinseq=117
T 10550 350 5 8 0 1 90 6 1
pintype=pwr
T 10600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 2400 400 2400 100 1 0 1
{
T 2350 350 5 8 1 1 90 6 1
pinnumber=118
T 2350 350 5 8 0 1 90 6 1
pinseq=118
T 2350 350 5 8 0 1 90 6 1
pintype=pwr
T 2400 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 10800 400 10800 100 1 0 1
{
T 10750 350 5 8 1 1 90 6 1
pinnumber=128
T 10750 350 5 8 0 1 90 6 1
pinseq=128
T 10750 350 5 8 0 1 90 6 1
pintype=pwr
T 10800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 11000 400 11000 100 1 0 1
{
T 10950 350 5 8 1 1 90 6 1
pinnumber=129
T 10950 350 5 8 0 1 90 6 1
pinseq=129
T 10950 350 5 8 0 1 90 6 1
pintype=pwr
T 11000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 11200 400 11200 100 1 0 1
{
T 11150 350 5 8 1 1 90 6 1
pinnumber=130
T 11150 350 5 8 0 1 90 6 1
pinseq=130
T 11150 350 5 8 0 1 90 6 1
pintype=pwr
T 11200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 11400 400 11400 100 1 0 1
{
T 11350 350 5 8 1 1 90 6 1
pinnumber=131
T 11350 350 5 8 0 1 90 6 1
pinseq=131
T 11350 350 5 8 0 1 90 6 1
pintype=pwr
T 11400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 11600 400 11600 100 1 0 1
{
T 11550 350 5 8 1 1 90 6 1
pinnumber=132
T 11550 350 5 8 0 1 90 6 1
pinseq=132
T 11550 350 5 8 0 1 90 6 1
pintype=pwr
T 11600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 11800 400 11800 100 1 0 1
{
T 11750 350 5 8 1 1 90 6 1
pinnumber=133
T 11750 350 5 8 0 1 90 6 1
pinseq=133
T 11750 350 5 8 0 1 90 6 1
pintype=pwr
T 11800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 2600 400 2600 100 1 0 1
{
T 2550 350 5 8 1 1 90 6 1
pinnumber=134
T 2550 350 5 8 0 1 90 6 1
pinseq=134
T 2550 350 5 8 0 1 90 6 1
pintype=pwr
T 2600 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 4600 400 4600 100 1 0 1
{
T 4550 350 5 8 1 1 90 6 1
pinnumber=143
T 4550 350 5 8 0 1 90 6 1
pinseq=143
T 4550 350 5 8 0 1 90 6 1
pintype=pwr
T 4600 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 12000 400 12000 100 1 0 1
{
T 11950 350 5 8 1 1 90 6 1
pinnumber=144
T 11950 350 5 8 0 1 90 6 1
pinseq=144
T 11950 350 5 8 0 1 90 6 1
pintype=pwr
T 12000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 2800 400 2800 100 1 0 1
{
T 2750 350 5 8 1 1 90 6 1
pinnumber=145
T 2750 350 5 8 0 1 90 6 1
pinseq=145
T 2750 350 5 8 0 1 90 6 1
pintype=pwr
T 2800 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 12200 400 12200 100 1 0 1
{
T 12150 350 5 8 1 1 90 6 1
pinnumber=155
T 12150 350 5 8 0 1 90 6 1
pinseq=155
T 12150 350 5 8 0 1 90 6 1
pintype=pwr
T 12200 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 3000 400 3000 100 1 0 1
{
T 2950 350 5 8 1 1 90 6 1
pinnumber=156
T 2950 350 5 8 0 1 90 6 1
pinseq=156
T 2950 350 5 8 0 1 90 6 1
pintype=pwr
T 3000 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 4800 400 4800 100 1 0 1
{
T 4750 350 5 8 1 1 90 6 1
pinnumber=157
T 4750 350 5 8 0 1 90 6 1
pinseq=157
T 4750 350 5 8 0 1 90 6 1
pintype=pwr
T 4800 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 5000 400 5000 100 1 0 1
{
T 4950 350 5 8 1 1 90 6 1
pinnumber=168
T 4950 350 5 8 0 1 90 6 1
pinseq=168
T 4950 350 5 8 0 1 90 6 1
pintype=pwr
T 5000 500 9 8 1 1 90 0 1
pinlabel=VDDINT
}
P 12400 400 12400 100 1 0 1
{
T 12350 350 5 8 1 1 90 6 1
pinnumber=170
T 12350 350 5 8 0 1 90 6 1
pinseq=170
T 12350 350 5 8 0 1 90 6 1
pintype=pwr
T 12400 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 3200 400 3200 100 1 0 1
{
T 3150 350 5 8 1 1 90 6 1
pinnumber=171
T 3150 350 5 8 0 1 90 6 1
pinseq=171
T 3150 350 5 8 0 1 90 6 1
pintype=pwr
T 3200 500 9 8 1 1 90 0 1
pinlabel=VDDEXT
}
P 12600 400 12600 100 1 0 1
{
T 12550 350 5 8 1 1 90 6 1
pinnumber=174
T 12550 350 5 8 0 1 90 6 1
pinseq=174
T 12550 350 5 8 0 1 90 6 1
pintype=pwr
T 12600 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 12800 400 12800 100 1 0 1
{
T 12750 350 5 8 1 1 90 6 1
pinnumber=175
T 12750 350 5 8 0 1 90 6 1
pinseq=175
T 12750 350 5 8 0 1 90 6 1
pintype=pwr
T 12800 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 13000 400 13000 100 1 0 1
{
T 12950 350 5 8 1 1 90 6 1
pinnumber=176
T 12950 350 5 8 0 1 90 6 1
pinseq=176
T 12950 350 5 8 0 1 90 6 1
pintype=pwr
T 13000 500 9 8 1 1 90 0 1
pinlabel=GND
}
P 13100 8400 13400 8400 1 0 1
{
T 13150 8450 5 8 1 1 0 0 1
pinnumber=21
T 13150 8450 5 8 0 1 0 0 1
pinseq=21
T 13150 8450 5 8 0 1 0 0 1
pintype=in
T 13000 8400 9 8 1 1 0 6 1
pinlabel=PPI_CLK
}
P 13100 8200 13400 8200 1 0 1
{
T 13150 8250 5 8 1 1 0 0 1
pinnumber=22
T 13150 8250 5 8 0 1 0 0 1
pinseq=22
T 13150 8250 5 8 0 1 0 0 1
pintype=io
T 13000 8200 9 8 1 1 0 6 1
pinlabel=PPI0
}
P 13100 8000 13400 8000 1 0 1
{
T 13150 8050 5 8 1 1 0 0 1
pinnumber=23
T 13150 8050 5 8 0 1 0 0 1
pinseq=23
T 13150 8050 5 8 0 1 0 0 1
pintype=io
T 13000 8000 9 8 1 1 0 6 1
pinlabel=PPI1
}
P 13100 7800 13400 7800 1 0 1
{
T 13150 7850 5 8 1 1 0 0 1
pinnumber=24
T 13150 7850 5 8 0 1 0 0 1
pinseq=24
T 13150 7850 5 8 0 1 0 0 1
pintype=io
T 13000 7800 9 8 1 1 0 6 1
pinlabel=PPI2
}
P 13100 7600 13400 7600 1 0 1
{
T 13150 7650 5 8 1 1 0 0 1
pinnumber=26
T 13150 7650 5 8 0 1 0 0 1
pinseq=26
T 13150 7650 5 8 0 1 0 0 1
pintype=io
T 13000 7600 9 8 1 1 0 6 1
pinlabel=PPI3
}
P 13100 7400 13400 7400 1 0 1
{
T 13150 7450 5 8 1 1 0 0 1
pinnumber=27
T 13150 7450 5 8 0 1 0 0 1
pinseq=27
T 13150 7450 5 8 0 1 0 0 1
pintype=io
T 13000 7400 9 8 1 1 0 6 1
pinlabel=(GPIO15/PPI4) PF15/PPI4
}
P 13100 7200 13400 7200 1 0 1
{
T 13150 7250 5 8 1 1 0 0 1
pinnumber=28
T 13150 7250 5 8 0 1 0 0 1
pinseq=28
T 13150 7250 5 8 0 1 0 0 1
pintype=io
T 13000 7200 9 8 1 1 0 6 1
pinlabel=(GPIO14/PPI5) PF14/PPI5
}
P 13100 7000 13400 7000 1 0 1
{
T 13150 7050 5 8 1 1 0 0 1
pinnumber=29
T 13150 7050 5 8 0 1 0 0 1
pinseq=29
T 13150 7050 5 8 0 1 0 0 1
pintype=io
T 13000 7000 9 8 1 1 0 6 1
pinlabel=(GPIO13/PPI6) PF13/PPI6
}
P 13100 6800 13400 6800 1 0 1
{
T 13150 6850 5 8 1 1 0 0 1
pinnumber=32
T 13150 6850 5 8 0 1 0 0 1
pinseq=32
T 13150 6850 5 8 0 1 0 0 1
pintype=io
T 13000 6800 9 8 1 1 0 6 1
pinlabel=(GPIO12/PPI7) PF12/PPI7
}
P 13100 6600 13400 6600 1 0 1
{
T 13150 6650 5 8 1 1 0 0 1
pinnumber=33
T 13150 6650 5 8 0 1 0 0 1
pinseq=33
T 13150 6650 5 8 0 1 0 0 1
pintype=io
T 13000 6600 9 8 1 1 0 6 1
pinlabel=(GPIO11/PPI8) PF11/PPI8
}
P 13100 6400 13400 6400 1 0 1
{
T 13150 6450 5 8 1 1 0 0 1
pinnumber=34
T 13150 6450 5 8 0 1 0 0 1
pinseq=34
T 13150 6450 5 8 0 1 0 0 1
pintype=io
T 13000 6400 9 8 1 1 0 6 1
pinlabel=(GPIO10/PPI9) PF10/PPI9
}
P 13100 6200 13400 6200 1 0 1
{
T 13150 6250 5 8 1 1 0 0 1
pinnumber=35
T 13150 6250 5 8 0 1 0 0 1
pinseq=35
T 13150 6250 5 8 0 1 0 0 1
pintype=io
T 13000 6200 9 8 1 1 0 6 1
pinlabel=(GPIO9/PPI10) PF9/PPI10
}
P 13100 6000 13400 6000 1 0 1
{
T 13150 6050 5 8 1 1 0 0 1
pinnumber=36
T 13150 6050 5 8 0 1 0 0 1
pinseq=36
T 13150 6050 5 8 0 1 0 0 1
pintype=io
T 13000 6000 9 8 1 1 0 6 1
pinlabel=(GPIO8/PPI11) PF8/PPI11
}
P 13100 5800 13400 5800 1 0 1
{
T 13150 5850 5 8 1 1 0 0 1
pinnumber=37
T 13150 5850 5 8 0 1 0 0 1
pinseq=37
T 13150 5850 5 8 0 1 0 0 1
pintype=io
T 13000 5800 9 8 1 1 0 6 1
pinlabel=(GPIO7/SPI Slave Select Enable 7/PPI12) PF7/SPISEL7/PPI12
}
P 13100 5600 13400 5600 1 0 1
{
T 13150 5650 5 8 1 1 0 0 1
pinnumber=38
T 13150 5650 5 8 0 1 0 0 1
pinseq=38
T 13150 5650 5 8 0 1 0 0 1
pintype=io
T 13000 5600 9 8 1 1 0 6 1
pinlabel=(GPIO6/SPI Slave Select Enable 6/PPI13) PF6/PPI13
}
P 13100 5400 13400 5400 1 0 1
{
T 13150 5450 5 8 1 1 0 0 1
pinnumber=46
T 13150 5450 5 8 0 1 0 0 1
pinseq=46
T 13150 5450 5 8 0 1 0 0 1
pintype=io
T 13000 5400 9 8 1 1 0 6 1
pinlabel=(GPIO5/SPI Slave Select Enable 5/PPI14)PF5/PPI14
}
P 13100 5200 13400 5200 1 0 1
{
T 13150 5250 5 8 1 1 0 0 1
pinnumber=47
T 13150 5250 5 8 0 1 0 0 1
pinseq=47
T 13150 5250 5 8 0 1 0 0 1
pintype=io
T 13000 5200 9 8 1 1 0 6 1
pinlabel=(GPIO4/SPI Slave Select Enable 4/PPI15)PF4/PPI15
}
P 13100 5000 13400 5000 1 0 1
{
T 13150 5050 5 8 1 1 0 0 1
pinnumber=48
T 13150 5050 5 8 0 1 0 0 1
pinseq=48
T 13150 5050 5 8 0 1 0 0 1
pintype=io
T 13000 5000 9 8 1 1 0 6 1
pinlabel=(GPIO3/SPI Slave Select Enable 3/PPI Frame Sync 3)PF3/SPISEL3/PPI_FS3
}
P 13100 4800 13400 4800 1 0 1
{
T 13150 4850 5 8 1 1 0 0 1
pinnumber=49
T 13150 4850 5 8 0 1 0 0 1
pinseq=49
T 13150 4850 5 8 0 1 0 0 1
pintype=io
T 13000 4800 9 8 1 1 0 6 1
pinlabel=(GPIO2/SPI Slave Select Enable 2) PF2/SPISEL2
}
P 13100 4600 13400 4600 1 0 1
{
T 13150 4650 5 8 1 1 0 0 1
pinnumber=50
T 13150 4650 5 8 0 1 0 0 1
pinseq=50
T 13150 4650 5 8 0 1 0 0 1
pintype=io
T 13000 4600 9 8 1 1 0 6 1
pinlabel=(GPIO1/SPI Slave Select Enable 1/External Timer Reference) PF1/SPISEL1/TMRCLK
}
P 13100 4400 13400 4400 1 0 1
{
T 13150 4450 5 8 1 1 0 0 1
pinnumber=51
T 13150 4450 5 8 0 1 0 0 1
pinseq=51
T 13150 4450 5 8 0 1 0 0 1
pintype=io
T 13000 4400 9 8 1 1 0 6 1
pinlabel=(GPIO 0/SPI Slave Select Input) PF0/SPISS
}
P 400 2900 100 2900 1 0 1
{
T 350 2950 5 8 1 1 0 6 1
pinnumber=53
T 350 2950 5 8 0 1 0 6 1
pinseq=53
T 350 2950 5 8 0 1 0 6 1
pintype=io
T 500 2900 9 8 1 1 0 0 1
pinlabel=SCK (SPI Clock)
}
P 400 2700 100 2700 1 0 1
{
T 350 2750 5 8 1 1 0 6 1
pinnumber=54
T 350 2750 5 8 0 1 0 6 1
pinseq=54
T 350 2750 5 8 0 1 0 6 1
pintype=io
T 500 2700 9 8 1 1 0 0 1
pinlabel=MISO (Master In Slave Out)
}
P 400 2500 100 2500 1 0 1
{
T 350 2550 5 8 1 1 0 6 1
pinnumber=55
T 350 2550 5 8 0 1 0 6 1
pinseq=55
T 350 2550 5 8 0 1 0 6 1
pintype=io
T 500 2500 9 8 1 1 0 0 1
pinlabel=MOSI (Master Out Slave In)
}
P 400 1800 100 1800 1 0 1
{
T 350 1850 5 8 1 1 0 6 1
pinnumber=77
T 350 1850 5 8 0 1 0 6 1
pinseq=77
T 350 1850 5 8 0 1 0 6 1
pintype=io
T 500 1800 9 8 1 1 0 0 1
pinlabel=TMR2/PPI_FS2 (Timer2/PPI Frame Sync 2)
}
P 400 2000 100 2000 1 0 1
{
T 350 2050 5 8 1 1 0 6 1
pinnumber=78
T 350 2050 5 8 0 1 0 6 1
pinseq=78
T 350 2050 5 8 0 1 0 6 1
pintype=io
T 500 2000 9 8 1 1 0 0 1
pinlabel=TMR1/PPI_FS1 (Timer1/PPI Frame Sync 1)
}
P 400 2200 100 2200 1 0 1
{
T 350 2250 5 8 1 1 0 6 1
pinnumber=79
T 350 2250 5 8 0 1 0 6 1
pinseq=79
T 350 2250 5 8 0 1 0 6 1
pintype=io
T 500 2200 9 8 1 1 0 0 1
pinlabel=TMR0 (Timer 0)
}
P 400 5400 100 5400 1 0 1
{
T 350 5450 5 8 1 1 0 6 1
pinnumber=58
T 350 5450 5 8 0 1 0 6 1
pinseq=58
T 350 5450 5 8 0 1 0 6 1
pintype=out
T 500 5400 9 8 1 1 0 0 1
pinlabel=DT1SEC (Transmit Data Secondary)
}
P 400 5600 100 5600 1 0 1
{
T 350 5650 5 8 1 1 0 6 1
pinnumber=59
T 350 5650 5 8 0 1 0 6 1
pinseq=59
T 350 5650 5 8 0 1 0 6 1
pintype=out
T 500 5600 9 8 1 1 0 0 1
pinlabel=DT1PRI (Transmit Data Primary)
}
P 400 5800 100 5800 1 0 1
{
T 350 5850 5 8 1 1 0 6 1
pinnumber=60
T 350 5850 5 8 0 1 0 6 1
pinseq=60
T 350 5850 5 8 0 1 0 6 1
pintype=io
T 500 5800 9 8 1 1 0 0 1
pinlabel=TFS1 (Transmit Frame Sync)
}
P 400 6000 100 6000 1 0 1
{
T 350 6050 5 8 1 1 0 6 1
pinnumber=61
T 350 6050 5 8 0 1 0 6 1
pinseq=61
T 350 6050 5 8 0 1 0 6 1
pintype=io
T 500 6000 9 8 1 1 0 0 1
pinlabel=TSCLK1 (Transmit Serial Clock)
}
P 400 6200 100 6200 1 0 1
{
T 350 6250 5 8 1 1 0 6 1
pinnumber=62
T 350 6250 5 8 0 1 0 6 1
pinseq=62
T 350 6250 5 8 0 1 0 6 1
pintype=in
T 500 6200 9 8 1 1 0 0 1
pinlabel=DR1SEC (Receive Data Secondary)
}
P 400 6400 100 6400 1 0 1
{
T 350 6450 5 8 1 1 0 6 1
pinnumber=63
T 350 6450 5 8 0 1 0 6 1
pinseq=63
T 350 6450 5 8 0 1 0 6 1
pintype=in
T 500 6400 9 8 1 1 0 0 1
pinlabel=DR1PRI (Receive Data Primary)
}
P 400 6600 100 6600 1 0 1
{
T 350 6650 5 8 1 1 0 6 1
pinnumber=64
T 350 6650 5 8 0 1 0 6 1
pinseq=64
T 350 6650 5 8 0 1 0 6 1
pintype=io
T 500 6600 9 8 1 1 0 0 1
pinlabel=RFS1 (Receive Frame Sync)
}
P 400 6800 100 6800 1 0 1
{
T 350 6850 5 8 1 1 0 6 1
pinnumber=65
T 350 6850 5 8 0 1 0 6 1
pinseq=65
T 350 6850 5 8 0 1 0 6 1
pintype=io
T 500 6800 9 8 1 1 0 0 1
pinlabel=RSCLK1 (Receive Serial Clock)
}
P 400 3700 100 3700 1 0 1
{
T 350 3750 5 8 1 1 0 6 1
pinnumber=67
T 350 3750 5 8 0 1 0 6 1
pinseq=67
T 350 3750 5 8 0 1 0 6 1
pintype=out
T 500 3700 9 8 1 1 0 0 1
pinlabel=DT0SEC (Transmit Data Secondary)
}
P 400 3900 100 3900 1 0 1
{
T 350 3950 5 8 1 1 0 6 1
pinnumber=68
T 350 3950 5 8 0 1 0 6 1
pinseq=68
T 350 3950 5 8 0 1 0 6 1
pintype=out
T 500 3900 9 8 1 1 0 0 1
pinlabel=DT0PRI (Transmit Data Primary)
}
P 400 4100 100 4100 1 0 1
{
T 350 4150 5 8 1 1 0 6 1
pinnumber=69
T 350 4150 5 8 0 1 0 6 1
pinseq=69
T 350 4150 5 8 0 1 0 6 1
pintype=io
T 500 4100 9 8 1 1 0 0 1
pinlabel=TFS0 (Transmit Frame Sync)
}
P 400 4300 100 4300 1 0 1
{
T 350 4350 5 8 1 1 0 6 1
pinnumber=72
T 350 4350 5 8 0 1 0 6 1
pinseq=72
T 350 4350 5 8 0 1 0 6 1
pintype=io
T 500 4300 9 8 1 1 0 0 1
pinlabel=TSCLK0 (Transmit Serial Clock)
}
P 400 4500 100 4500 1 0 1
{
T 350 4550 5 8 1 1 0 6 1
pinnumber=73
T 350 4550 5 8 0 1 0 6 1
pinseq=73
T 350 4550 5 8 0 1 0 6 1
pintype=in
T 500 4500 9 8 1 1 0 0 1
pinlabel=DR0SEC (Receive Data Secondary)
}
P 400 4700 100 4700 1 0 1
{
T 350 4750 5 8 1 1 0 6 1
pinnumber=74
T 350 4750 5 8 0 1 0 6 1
pinseq=74
T 350 4750 5 8 0 1 0 6 1
pintype=in
T 500 4700 9 8 1 1 0 0 1
pinlabel=DR0PRI (Receive Data Primary)
}
P 400 4900 100 4900 1 0 1
{
T 350 4950 5 8 1 1 0 6 1
pinnumber=75
T 350 4950 5 8 0 1 0 6 1
pinseq=75
T 350 4950 5 8 0 1 0 6 1
pintype=io
T 500 4900 9 8 1 1 0 0 1
pinlabel=RFS0 (Receive Frame Sync)
}
P 400 5100 100 5100 1 0 1
{
T 350 5150 5 8 1 1 0 6 1
pinnumber=76
T 350 5150 5 8 0 1 0 6 1
pinseq=76
T 350 5150 5 8 0 1 0 6 1
pintype=io
T 500 5100 9 8 1 1 0 0 1
pinlabel=RSCLK0 (Receive Serial Clock)
}
B 400 400 12700 10500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 13100 1200 400 1200 3 0 0 0 -1 -1
L 400 1700 6800 1700 3 0 0 0 -1 -1
L 400 2400 6800 2400 3 0 0 0 -1 -1
L 400 3100 6800 3100 3 0 0 0 -1 -1
L 400 3600 6800 3600 3 0 0 0 -1 -1
L 400 5300 6800 5300 3 0 0 0 -1 -1
L 400 7000 6800 7000 3 0 0 0 -1 -1
L 400 8800 6800 8800 3 0 0 0 -1 -1
L 13100 10100 400 10100 3 0 0 0 -1 -1
L 6800 10100 6800 1200 3 0 0 0 -1 -1
L 6800 8600 13100 8600 3 0 0 0 -1 -1
L 6800 4300 13100 4300 3 0 0 0 -1 -1
L 6800 3000 13100 3000 3 0 0 0 -1 -1
L 6800 2100 13100 2100 3 0 0 0 -1 -1
T 4300 10300 9 10 1 0 0 0 2
Address bus for
Async/Sync Access
T 8100 10300 9 10 1 0 0 0 2
Data bus for
Async/Sync Access
L 6100 10900 6100 10100 3 0 0 0 -1 -1
L 8000 10900 8000 10100 3 0 0 0 -1 -1
V 350 9700 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 9300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 9100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 8900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 8600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 8400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 8200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 8000 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 7200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 350 7400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 9900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 9700 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 9500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 8700 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 4100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 3500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
V 13150 2400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 13000 1900 13100 1975 3 0 0 0 -1 -1
L 13000 1900 13100 1825 3 0 0 0 -1 -1
L 13000 1700 13100 1775 3 0 0 0 -1 -1
L 13000 1700 13100 1625 3 0 0 0 -1 -1
L 13000 1500 13100 1575 3 0 0 0 -1 -1
L 13000 1500 13100 1425 3 0 0 0 -1 -1
L 13000 1300 13100 1375 3 0 0 0 -1 -1
L 13000 1300 13100 1225 3 0 0 0 -1 -1
L 13000 3700 13100 3775 3 0 0 0 -1 -1
L 13000 3700 13100 3625 3 0 0 0 -1 -1
L 13000 8400 13100 8475 3 0 0 0 -1 -1
L 13000 8400 13100 8325 3 0 0 0 -1 -1
L 13000 9100 13100 9175 3 0 0 0 -1 -1
L 13000 9100 13100 9025 3 0 0 0 -1 -1
L 500 2900 400 2975 3 0 0 0 -1 -1
L 500 2900 400 2825 3 0 0 0 -1 -1
V 350 7600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 12552 4527 13000 4525 3 0 0 0 -1 -1
T 4300 9300 9 10 1 0 0 0 1
Memory Interface Control
T 4100 7800 9 10 1 0 0 0 1
Asynchronous Memory Control
T 6900 9400 9 10 1 0 0 0 1
Synchronous Memory Control
T 6900 8400 9 10 1 0 0 0 1
Parallel Peripheral Interface Port / GPIO
T 6900 3600 9 10 1 0 0 0 1
JTAG Test and Emulation Port
T 6900 2500 9 10 1 0 0 0 1
Mode Controls
T 6900 1600 9 10 1 0 0 0 1
Clocks
T 5600 4200 9 10 1 0 0 0 3
Dual Channel,
Full Duplex,
Serial Port 0
T 5600 5900 9 10 1 0 0 0 3
Dual Channel,
Full Duplex,
Serial Port 1
T 5600 3300 9 10 1 0 0 0 1
IRDA / UART
T 6400 2700 9 10 1 0 0 0 1
SPI
T 6200 2000 9 10 1 0 0 0 1
Timers
T 4500 1400 9 10 1 0 0 0 1
Internal Voltage Regulator
T 6204 11004 8 10 0 0 0 0 1
numslots=0
L 6937 6687 9229 6687 3 0 0 0 -1 -1
L 9229 6687 9229 7520 3 0 0 0 -1 -1
L 9229 7520 6937 7520 3 0 0 0 -1 -1
L 6937 7520 6937 6687 3 0 0 0 -1 -1
L 8192 7137 8192 7421 3 0 0 0 -1 -1
L 8192 7421 8135 7421 3 0 0 0 -1 -1
L 8135 7421 8135 7232 3 0 0 0 -1 -1
L 8135 7232 8015 7421 3 0 0 0 -1 -1
L 8015 7421 7957 7421 3 0 0 0 -1 -1
L 7957 7421 7957 7137 3 0 0 0 -1 -1
L 7957 7137 8014 7137 3 0 0 0 -1 -1
L 8014 7137 8014 7328 3 0 0 0 -1 -1
L 8014 7328 8139 7137 3 0 0 0 -1 -1
L 8139 7137 8192 7137 3 0 0 0 -1 -1
L 8662 7137 8662 7185 3 0 0 0 -1 -1
L 8662 7185 8534 7185 3 0 0 0 -1 -1
L 8534 7185 8534 7421 3 0 0 0 -1 -1
L 8534 7421 8478 7421 3 0 0 0 -1 -1
L 8478 7421 8478 7137 3 0 0 0 -1 -1
L 8478 7137 8662 7137 3 0 0 0 -1 -1
L 8466 7137 8359 7421 3 0 0 0 -1 -1
L 8359 7421 8301 7421 3 0 0 0 -1 -1
L 8301 7421 8205 7137 3 0 0 0 -1 -1
L 8205 7137 8262 7137 3 0 0 0 -1 -1
L 8262 7137 8281 7200 3 0 0 0 -1 -1
L 8281 7200 8386 7200 3 0 0 0 -1 -1
L 8386 7200 8408 7137 3 0 0 0 -1 -1
L 8408 7137 8466 7137 3 0 0 0 -1 -1
L 8368 7240 8367 7240 3 0 0 0 -1 -1
L 8367 7240 8295 7240 3 0 0 0 -1 -1
L 8295 7240 8295 7255 3 0 0 0 -1 -1
L 8295 7255 8331 7362 3 0 0 0 -1 -1
L 8331 7362 8367 7255 3 0 0 0 -1 -1
L 8367 7255 8368 7249 3 0 0 0 -1 -1
L 8368 7249 8368 7239 3 0 0 0 -1 -1
L 8368 7239 8368 7240 3 0 0 0 -1 -1
L 7946 7136 7838 7420 3 0 0 0 -1 -1
L 7838 7420 7780 7420 3 0 0 0 -1 -1
L 7780 7420 7685 7136 3 0 0 0 -1 -1
L 7685 7136 7742 7136 3 0 0 0 -1 -1
L 7742 7136 7761 7199 3 0 0 0 -1 -1
L 7761 7199 7866 7199 3 0 0 0 -1 -1
L 7866 7199 7888 7136 3 0 0 0 -1 -1
L 7888 7136 7946 7136 3 0 0 0 -1 -1
L 7846 7239 7776 7239 3 0 0 0 -1 -1
L 7776 7239 7778 7257 3 0 0 0 -1 -1
L 7778 7257 7810 7361 3 0 0 0 -1 -1
L 7810 7361 7846 7256 3 0 0 0 -1 -1
L 7846 7256 7847 7238 3 0 0 0 -1 -1
L 7847 7238 7846 7239 3 0 0 0 -1 -1
L 8795 7424 8737 7411 3 0 0 0 -1 -1
L 8737 7411 8694 7378 3 0 0 0 -1 -1
L 8694 7378 8668 7331 3 0 0 0 -1 -1
L 8668 7331 8659 7278 3 0 0 0 -1 -1
L 8659 7278 8667 7224 3 0 0 0 -1 -1
L 8667 7224 8692 7176 3 0 0 0 -1 -1
L 8692 7176 8734 7143 3 0 0 0 -1 -1
L 8734 7143 8794 7130 3 0 0 0 -1 -1
L 8794 7130 8852 7143 3 0 0 0 -1 -1
L 8852 7143 8893 7176 3 0 0 0 -1 -1
L 8893 7176 8918 7223 3 0 0 0 -1 -1
L 8918 7223 8926 7277 3 0 0 0 -1 -1
L 8926 7277 8917 7331 3 0 0 0 -1 -1
L 8917 7331 8893 7378 3 0 0 0 -1 -1
L 8893 7378 8852 7411 3 0 0 0 -1 -1
L 8852 7411 8795 7424 3 0 0 0 -1 -1
L 8794 7376 8828 7367 3 0 0 0 -1 -1
L 8828 7367 8852 7345 3 0 0 0 -1 -1
L 8852 7345 8866 7313 3 0 0 0 -1 -1
L 8866 7313 8871 7277 3 0 0 0 -1 -1
L 8871 7277 8866 7241 3 0 0 0 -1 -1
L 8866 7241 8851 7209 3 0 0 0 -1 -1
L 8851 7209 8826 7187 3 0 0 0 -1 -1
L 8826 7187 8791 7179 3 0 0 0 -1 -1
L 8791 7179 8757 7187 3 0 0 0 -1 -1
L 8757 7187 8733 7210 3 0 0 0 -1 -1
L 8733 7210 8719 7242 3 0 0 0 -1 -1
L 8719 7242 8715 7278 3 0 0 0 -1 -1
L 8715 7278 8720 7315 3 0 0 0 -1 -1
L 8720 7315 8735 7346 3 0 0 0 -1 -1
L 8735 7346 8759 7369 3 0 0 0 -1 -1
L 8759 7369 8793 7377 3 0 0 0 -1 -1
L 8793 7377 8794 7376 3 0 0 0 -1 -1
L 9200 7143 9200 7287 3 0 0 0 -1 -1
L 9200 7287 9083 7287 3 0 0 0 -1 -1
L 9083 7287 9083 7243 3 0 0 0 -1 -1
L 9083 7243 9151 7243 3 0 0 0 -1 -1
L 9151 7243 9151 7229 3 0 0 0 -1 -1
L 9151 7229 9146 7220 3 0 0 0 -1 -1
L 9146 7220 9132 7202 3 0 0 0 -1 -1
L 9132 7202 9109 7185 3 0 0 0 -1 -1
L 9109 7185 9076 7177 3 0 0 0 -1 -1
L 9076 7177 9039 7186 3 0 0 0 -1 -1
L 9039 7186 9014 7210 3 0 0 0 -1 -1
L 9014 7210 8999 7242 3 0 0 0 -1 -1
L 8999 7242 8994 7279 3 0 0 0 -1 -1
L 8994 7279 9000 7316 3 0 0 0 -1 -1
L 9000 7316 9016 7348 3 0 0 0 -1 -1
L 9016 7348 9041 7370 3 0 0 0 -1 -1
L 9041 7370 9077 7378 3 0 0 0 -1 -1
L 9077 7378 9103 7373 3 0 0 0 -1 -1
L 9103 7373 9122 7361 3 0 0 0 -1 -1
L 9122 7361 9135 7345 3 0 0 0 -1 -1
L 9135 7345 9144 7330 3 0 0 0 -1 -1
L 9144 7330 9193 7331 3 0 0 0 -1 -1
L 9193 7331 9189 7347 3 0 0 0 -1 -1
L 9189 7347 9173 7377 3 0 0 0 -1 -1
L 9173 7377 9159 7393 3 0 0 0 -1 -1
L 9159 7393 9137 7408 3 0 0 0 -1 -1
L 9137 7408 9110 7420 3 0 0 0 -1 -1
L 9110 7420 9078 7424 3 0 0 0 -1 -1
L 9078 7424 9018 7411 3 0 0 0 -1 -1
L 9018 7411 8976 7378 3 0 0 0 -1 -1
L 8976 7378 8950 7332 3 0 0 0 -1 -1
L 8950 7332 8941 7279 3 0 0 0 -1 -1
L 8941 7279 8949 7226 3 0 0 0 -1 -1
L 8949 7226 8973 7179 3 0 0 0 -1 -1
L 8973 7179 9014 7146 3 0 0 0 -1 -1
L 9014 7146 9071 7132 3 0 0 0 -1 -1
L 9071 7132 9105 7136 3 0 0 0 -1 -1
L 9105 7136 9130 7149 3 0 0 0 -1 -1
L 9130 7149 9147 7162 3 0 0 0 -1 -1
L 9147 7162 9156 7171 3 0 0 0 -1 -1
L 9156 7171 9155 7143 3 0 0 0 -1 -1
L 9155 7143 9200 7143 3 0 0 0 -1 -1
L 7577 6781 7577 7419 3 0 0 0 -1 -1
L 7577 7419 6943 7419 3 0 0 0 -1 -1
L 6943 7419 6943 6781 3 0 0 0 -1 -1
L 6943 6781 7577 6781 3 0 0 0 -1 -1
L 7471 7096 7074 6862 3 0 0 0 -1 -1
L 7074 6862 7074 7320 3 0 0 0 -1 -1
L 7074 7320 7471 7096 3 0 0 0 -1 -1
L 8408 7056 8408 7071 3 0 0 0 -1 -1
L 8408 7071 8352 7071 3 0 0 0 -1 -1
L 8352 7071 8290 6864 3 0 0 0 -1 -1
L 8290 6864 8226 7072 3 0 0 0 -1 -1
L 8226 7072 8169 7072 3 0 0 0 -1 -1
L 8169 7072 8169 7057 3 0 0 0 -1 -1
L 8169 7057 8263 6789 3 0 0 0 -1 -1
L 8263 6789 8317 6789 3 0 0 0 -1 -1
L 8317 6789 8408 7056 3 0 0 0 -1 -1
L 8980 6788 8980 6836 3 0 0 0 -1 -1
L 8980 6836 8827 6836 3 0 0 0 -1 -1
L 8827 6836 8827 6911 3 0 0 0 -1 -1
L 8827 6911 8957 6911 3 0 0 0 -1 -1
L 8957 6911 8957 6962 3 0 0 0 -1 -1
L 8957 6962 8826 6962 3 0 0 0 -1 -1
L 8826 6962 8826 7021 3 0 0 0 -1 -1
L 8826 7021 8973 7021 3 0 0 0 -1 -1
L 8973 7021 8973 7072 3 0 0 0 -1 -1
L 8973 7072 8771 7072 3 0 0 0 -1 -1
L 8771 7072 8771 6788 3 0 0 0 -1 -1
L 8771 6788 8980 6788 3 0 0 0 -1 -1
L 8156 6788 8156 6836 3 0 0 0 -1 -1
L 8156 6836 8000 6836 3 0 0 0 -1 -1
L 8000 6836 8000 6913 3 0 0 0 -1 -1
L 8000 6913 8133 6913 3 0 0 0 -1 -1
L 8133 6913 8133 6964 3 0 0 0 -1 -1
L 8133 6964 7999 6964 3 0 0 0 -1 -1
L 7999 6964 7999 7025 3 0 0 0 -1 -1
L 7999 7025 8151 7025 3 0 0 0 -1 -1
L 8151 7025 8151 7072 3 0 0 0 -1 -1
L 8151 7072 7942 7072 3 0 0 0 -1 -1
L 7942 7072 7942 6788 3 0 0 0 -1 -1
L 7942 6788 8156 6788 3 0 0 0 -1 -1
L 7921 6926 7912 6983 3 0 0 0 -1 -1
L 7912 6983 7887 7030 3 0 0 0 -1 -1
L 7887 7030 7846 7061 3 0 0 0 -1 -1
L 7846 7061 7791 7072 3 0 0 0 -1 -1
L 7791 7072 7681 7072 3 0 0 0 -1 -1
L 7681 7072 7681 6788 3 0 0 0 -1 -1
L 7681 6788 7790 6788 3 0 0 0 -1 -1
L 7790 6788 7848 6798 3 0 0 0 -1 -1
L 7848 6798 7889 6826 3 0 0 0 -1 -1
L 7889 6826 7913 6869 3 0 0 0 -1 -1
L 7913 6869 7921 6925 3 0 0 0 -1 -1
L 7921 6925 7921 6926 3 0 0 0 -1 -1
L 7862 6927 7859 6895 3 0 0 0 -1 -1
L 7859 6895 7849 6865 3 0 0 0 -1 -1
L 7849 6865 7827 6842 3 0 0 0 -1 -1
L 7827 6842 7789 6832 3 0 0 0 -1 -1
L 7789 6832 7741 6831 3 0 0 0 -1 -1
L 7741 6831 7741 7023 3 0 0 0 -1 -1
L 7741 7023 7785 7023 3 0 0 0 -1 -1
L 7785 7023 7823 7013 3 0 0 0 -1 -1
L 7823 7013 7846 6988 3 0 0 0 -1 -1
L 7846 6988 7858 6957 3 0 0 0 -1 -1
L 7858 6957 7861 6928 3 0 0 0 -1 -1
L 7861 6928 7862 6927 3 0 0 0 -1 -1
L 8485 6789 8485 7071 3 0 0 0 -1 -1
L 8485 7071 8425 7071 3 0 0 0 -1 -1
L 8425 7071 8425 6789 3 0 0 0 -1 -1
L 8425 6789 8485 6789 3 0 0 0 -1 -1
L 8761 6880 8705 6880 3 0 0 0 -1 -1
L 8705 6880 8701 6869 3 0 0 0 -1 -1
L 8701 6869 8691 6851 3 0 0 0 -1 -1
L 8691 6851 8673 6833 3 0 0 0 -1 -1
L 8673 6833 8643 6826 3 0 0 0 -1 -1
L 8643 6826 8610 6835 3 0 0 0 -1 -1
L 8610 6835 8587 6859 3 0 0 0 -1 -1
L 8587 6859 8572 6893 3 0 0 0 -1 -1
L 8572 6893 8568 6931 3 0 0 0 -1 -1
L 8568 6931 8572 6969 3 0 0 0 -1 -1
L 8572 6969 8587 7002 3 0 0 0 -1 -1
L 8587 7002 8610 7024 3 0 0 0 -1 -1
L 8610 7024 8643 7031 3 0 0 0 -1 -1
L 8643 7031 8663 7025 3 0 0 0 -1 -1
L 8663 7025 8681 7011 3 0 0 0 -1 -1
L 8681 7011 8694 6994 3 0 0 0 -1 -1
L 8694 6994 8704 6978 3 0 0 0 -1 -1
L 8704 6978 8760 6978 3 0 0 0 -1 -1
L 8760 6978 8758 6986 3 0 0 0 -1 -1
L 8758 6986 8753 6999 3 0 0 0 -1 -1
L 8753 6999 8746 7014 3 0 0 0 -1 -1
L 8746 7014 8735 7031 3 0 0 0 -1 -1
L 8735 7031 8719 7048 3 0 0 0 -1 -1
L 8719 7048 8698 7062 3 0 0 0 -1 -1
L 8698 7062 8671 7072 3 0 0 0 -1 -1
L 8671 7072 8637 7076 3 0 0 0 -1 -1
L 8637 7076 8578 7063 3 0 0 0 -1 -1
L 8578 7063 8537 7030 3 0 0 0 -1 -1
L 8537 7030 8515 6982 3 0 0 0 -1 -1
L 8515 6982 8509 6928 3 0 0 0 -1 -1
L 8509 6928 8519 6873 3 0 0 0 -1 -1
L 8519 6873 8545 6826 3 0 0 0 -1 -1
L 8545 6826 8584 6793 3 0 0 0 -1 -1
L 8584 6793 8636 6781 3 0 0 0 -1 -1
L 8636 6781 8675 6786 3 0 0 0 -1 -1
L 8675 6786 8705 6797 3 0 0 0 -1 -1
L 8705 6797 8727 6813 3 0 0 0 -1 -1
L 8727 6813 8742 6831 3 0 0 0 -1 -1
L 8742 6831 8752 6849 3 0 0 0 -1 -1
L 8752 6849 8757 6864 3 0 0 0 -1 -1
L 8757 6864 8759 6875 3 0 0 0 -1 -1
L 8759 6875 8760 6880 3 0 0 0 -1 -1
L 8760 6880 8761 6880 3 0 0 0 -1 -1
L 9212 6869 9206 6905 3 0 0 0 -1 -1
L 9206 6905 9188 6929 3 0 0 0 -1 -1
L 9188 6929 9159 6945 3 0 0 0 -1 -1
L 9159 6945 9118 6955 3 0 0 0 -1 -1
L 9118 6955 9090 6960 3 0 0 0 -1 -1
L 9090 6960 9065 6967 3 0 0 0 -1 -1
L 9065 6967 9048 6979 3 0 0 0 -1 -1
L 9048 6979 9041 6999 3 0 0 0 -1 -1
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author=Ivan Danov
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email=idanov@gmail.com
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dist-license=GPL
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use-license=unlimited